San Jose, California
•
Today
Role : Verification Lead Memory Controller (CHI-G / DFI) Location : San Jose, CA (Onsite) | Lead Level | Exp : 10+ Years We are looking for a Verification Lead with strong hands-on experience in Memory Controller Design Verification. Key Skills: 10+ years Design Verification experience 3+ years in Verification Lead/Management DDR4/DDR5/LPDDR Memory Controller verification ARM CHI / CHI-G protocol verification DFI interface & PHY verification Expert SystemVerilog / UVM AXI4 / ACE / AHB /
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Depends on Experience











