Lec jobs in new mexico

ASIC Physical Design Engineer / RTL Synthesis Engineer

Remote

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Today

This is Ganesh from DELLA INFOTECH INC. We have an outstanding opening for you for the opportunity below. Please check the job description and share your updated resume, if you are interested. Hiring: Senior ASIC RTL-to-Physical Design (RTL2PD) / RTL Synthesis Engineer Location: San Jose, CA(onsite) Experience: 8 to 12 years What will Be Doing: RTL Synthesis, Constraint writing, validation, Static timing AnalysisWriting Scripts/Modiying scripts for RTL synthesis, SDC creation, STADebug synthesi

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Third Party, Contract

$60 - $65

Lead ASIC DFT Engineer

Remote

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Today

We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues. The ideal candidate will have strong hands-on expertise in DFT fundamentals

Full-time

Asics Engineer

Remote

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Today

Requirements please see these key words of in the project description for the profile consideration. "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern Retargeting , Pattern porting, DRCs, TetraMax, DFTMax " Experience 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requir

Full-time

Lead ASIC DFT Engineer

Remote

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21d ago

Role: Lead ASIC DFT Engineer Location: Remote, (Onsite) Duration: Contract Year of Exp: 10+ yrs to 15 yrs. Job Description: We are seeking a highly experienced Lead ASIC DFT Engineerto architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts a

Easy Apply

Third Party, Contract

110 - 120

ASIC DFT Staff Engineer

Remote

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Today

Job Title: ASIC DFT Staff Engineer Location: Remote Job Description: Key Skills: "SCAN, ATPG, MBIST, Timing Simulations, SDF, SDC , PSV, Diagnosys , Pattern Retargeting , Pattern porting, DRCs, TetraMax, DFTMax " Experience: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary: We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical own

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Third Party, Contract

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal)

Albuquerque, New Mexico

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Today

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/FPGA Design or Verification Engineers (Lead, Senior, or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Albuquerque, NM. From complex digitally beamformed phased arrays for constellation satellite programs to computing and network

Full-time

USD 136,850.00 - 185,150.00 per year

Lec jobs in New Mexico, USA