Serdes jobs | Dice.com

Signal Integrity Engineer - Serdes, Satellites (Starlink)

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SIGNAL INTEGRITY ENGINEER - SERDES, SATELLITES (STARLINK) SpaceX is leveraging its experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the

Full-time

USD 115,000.00 - 155,000.00 per year

Signal Integrity Engineer - Serdes, Satellites (Starlink)

Redmond, Washington

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Today

Full-time

USD 105,000.00 - 145,000.00 per year

Analog Designer - SERDES

Hybrid in Austin, Texas

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Today

SERDES PHY Integration & Validation EngineerLocation: Austin, TX Experience: 9+ years preferred Education: Bachelors or Masters degree in Electrical Engineering or Computer Engineering Role OverviewAMDs 3rd Party IP Team is seeking an experienced engineer with a strong background in SERDES PHYs or Memory PHYs to support the integration of third-party PHY IP across AMD products. The role involves both pre-silicon IP integration and post-silicon validation and support, with a focus on electrical a

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Contract

55 - 60

Senior ATE Production Test Engineer – SerDes / Co-Packaged Optics (CPO)

Hybrid in San Jose, California

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Today

Senior ATE Production Test Engineer SerDes / Co-Packaged Optics (CPO)Location: San Jose, CA Fully Onsite Experience: 6+ years preferred Role OverviewWe are seeking a hands-on Production Test Engineer to develop and optimize automated test equipment (ATE) programs for SoC devices featuring SerDes interfaces and Co-Packaged Optics (CPO). The engineer will lead production test development for wafer sort and final test, focusing on design-for-test (DFT), built-in self-test (BIST), yield optimizati

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Contract

55 - 60

Mixed Signal Verification Engineer

San Jose, California

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Today

Job Description ONSITE in San Jose, CA JOB RESPONSIBILITIES Creating AMS/DMS testbench for wireless RF and High Speed PHY. Working with RF/Analog design engineers for analog circuit models Support silicon bring-up and commercialization. REQUIRED SKILLS BS or BE minimum, 3+ year experiences Deep understanding of digital VLSI simulation flow Deep understanding of mixed-mode and analog simulation flow Experience with Verilog/SystemVerilog and RNM modeling Experience with digital verification, U

Contract

Semiconductor Validation Engineer 26-26817

San Jose, California

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Today

Duration: 12 months Job Description: In this role, the engineer will be part of a highly technical team that:Develops test plans, completes functional and electrical validation, and debugs issues for new processor silicon interface features, with a strong focus on power management.Writes comprehensive electrical and functional test plans for processor interface validation of processors.Executes electrical and functional test plans for client processors using hardware and software validation too

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Contract

$80 - $90

Signal Integrity Engineer

Almont, Colorado

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30+d ago

Location:RTP, NC, USA Contract Role:Work Mode: Onsite Duration: 12 Months Job Description:Minimum Requirements:Bachelors or Masters degree in Electrical Engineering or a related field.35 years of relevant experience in signal integrity or hardware design.Knowledge of transmission line theory and high-speed circuit fundamentals, with experience using signal-integrity simulation and 2D/3D field-solver tools.Desired Skills:Experience with laboratory equipment such as oscilloscopes, TDR, or VNA.Expe

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Contract

60 - 62

ATE Test Engineer

Fort Collins, Colorado

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17d ago

Syntronic ATE Tester/ Fort Collins, CO Are you ready to be part of a leading global engineering design house specializing in the design and development of state-of-the-art embedded hardware, electronics, and electro-mechanics? What were looking for: Highly motivated professionals Motivated Hardware Designer Professionals with ability to work both with in-house projects and on-site assignments at our customers locations What youll do Develop, debug, and optimize test programs on Advantest

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Full-time

70,000 - 120,000

Senior Serdes System Design Engineer/Architect

Austin, Texas

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: This is a DSP/Systems Design Engineering position for high-speed Serdes products in the Physical Layer Products (PLP) Division. You will join a team of expert communication system/mixed-signal ASIC designers involved in the design, verification, and im

Full-time

USD 121,900.00 - 195,000.00 per year

Principal Engineer, SerDes AMS Design and Architecture

San Jose, California

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Today

Principal Engineer, SerDes AMS Design and Architecture Location: San Jose, CA (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world's leading semiconduct

Full-time

USD 200,000.00 - 260,000.00 per year

SerDes Validation engineer

San Jose, California

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Today

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Joi

Full-time

USD 145,600.00 per year

Senior Serdes Characterization & Post-Silicon Validation Engineer

Seattle, Washington

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Today

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price - and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missi

Full-time

USD 170,000.00 - 250,000.00 per year

Senior Serdes Characterization & Post-Silicon Validation Engineer

Los Angeles, California

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Today

Full-time

USD 170,000.00 - 250,000.00 per year

Principal Engineer, SerDes Validation

San Jose, California

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Today

Principal Engineer, SerDes Validation Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-pa

Full-time

USD 180,000.00 - 230,000.00 per year

Synthesis & STA Engineer - High-Speed SerDes

San Jose, California

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Today

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

Full-time

USD 160,000.00 - 200,000.00 per year

Principal SerDes Bring-up Validation Engineer

San Jose, California

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Today

Full-time

USD 185,000.00 - 240,000.00 per year

SerDes System Validation Engineer

Cupertino, California

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Today

We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team and participate in validation and debug of embedded circuits; collaborating with many teams to enable the world's premiere products. You will closely work with a hard-working group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apple's products while exceeding the highest

Full-time

Mixed Signal Engineer Intern

No location provided

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Today

AI Vision Processors For Edge Applications Our solutions make cameras smarter by extracting valuable data from high-resolution video streams. Job Description Job description: As a member of the Mixed Signal team, the candidate will work with senior circuit designers in the design, validation and characterization of mixed signal and analog IP blocks for SOC. The IPs include PLL, DLL, SERDES, high speed IO and data converters, etc. for sub-14nm technologies. The candidate will have exposure to

Full-time

Firmware Engineer

Fort Collins, Colorado

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom's ASIC Products Division is seeking a highly skilled Firmware Engineer to join our embedded systems development team. In this role, you will architect, design, and implement low-level firmware modules, middleware, and diagnostic software for l

Full-time

USD 109,700.00 - 175,500.00 per year

Analog/Mixed Signal IP Engineering Program Manager

Austin, Texas

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Today

Apple is seeking an experienced Analog/Mixed-signal IP Design Engineering Lead to join our dynamic team. As a key player, you will be responsible for driving the development of high-speed Analog and Mixed-signal IPs for our System-on-Chips (SoCs), from concept to mass production. You will work closely with cross-functional teams, including SoC Integration, Technology/Library, SoC Design, SoC PD, SoC DV, CAD, software, and hardware to ensure the quality, schedule and success of our IPs. Descript

Full-time