systemverilog Jobs

Refine Results
1 - 20 of 195 Jobs

RTL Engineer: Integrate RISC-V Core to SoC

Intelliswift Software Inc

Santa Clara, California, USA

Contract

Job Title: RTL Engineer: Integrate RISC-V Core to SoC Location(s): Santa Clara, CA - Onsite Must Have skills: 5+ years of experience in RTL design, SoC integration, or related areas.Strong hands-on experience with hardware description languages (Verilog, SystemVerilog, VHDL), EDA tools, and simulators (VCS, NC, Verilator).Deep understanding of SoC design, integration, and high-performance interfaces (e.g., AXI, TileLink, PCIe, Ethernet).Proven ability to debug and optimize designs for functiona

Sr. Analog/Mixed-Signal Verification Engineer (Silicon Engineering)

SpaceX

Redmond, Washington, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. ANALOG/MIXED-SIGNAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

Redmond, Washington, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

ASIC/SOC Emulation Engineer

INFT Solutions inc

US

Full-time, Part-time, Contract, Third Party

Role: ASIC/SOC Emulation Engineer Work location: Santa Clara, CA. Job Description: "ASIC Emulation Engineer Develop emulation testbenches in System Verilog and/or C/C++. Deliver emulation and prototyping models from RTL on industry standard emulation and prototyping platforms. Build and execute emulation test plan to ensure quality of the models and assist pre-silicon validation. Drive emulation methodologies for HW verification and SW development. Develop emulation tools, workflows, and infras

Design Verification Engineer

Mirafra Inc

San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Senior FPGA Design Engineer

Triple Crown Consulting

El Segundo, California, USA

Contract

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth. CONTRACT Position: 12 Months Location: Onsite in Northridge, CA (Preferred) or El Segundo, CA s We are seeking a highly skilled FPGA Design Engineer to contribute to the design,

Digital SoC Design Verification Principal Engineer/Manager

Island Staffing

San Jose, California, USA

Full-time

Digital SoC Design Verification Principal Engineer/Manager 140-225K (+ Pre-IPO Stock Options) San Jose, CA (hybrid 1 day/week remote, 4 days/week onsite) We are looking for an experienced Digital SoC Design Verification Principal Engineer/Manager to lead a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. In this role, you will be responsible for driving the development of high-quality digital solutions and contributing to product definition

Principal Digital ASIC Designer

Judge Group, Inc.

Clearfield, Utah, USA

Full-time

Location: Clearfield, UT Salary: $150,000.00 USD Annually - $200,000.00 USD Annually Description: We're seeking a highly motivated Senior Digital ASIC Design Engineer to join our cutting-edge team focused on advancing digital integrated circuit technologies. In this role, you'll design and implement high-performance ASICs from RTL through synthesis, collaborating across disciplines to drive innovation and deliver impactful solutions in diverse application domains. This job will have the fo

FPGA Development Engineer

Judge Group, Inc.

Pennsylvania, USA

Full-time

Location: East Bradford, PA Salary: $120,000.00 USD Annually - $140,000.00 USD Annually Description: Our client is currently seeking a FPGA Development Engineer. This is a permanent, direct hire, hybrid position. Responsibilities: Develop Verilog/System Verilog codeCollaborate on transceiver selection and FPGA pinoutValidate features through lab testing and simulationDocument designs and provide technical supportWork with PCB designers, software engineers, and FPGA/ASIC developers Requireme

Senior AMS Design Engineer

Judge Group, Inc.

Cambridge, Massachusetts, USA

Full-time

Location: Cambridge, MA Salary: $150,000.00 USD Annually - $180,000.00 USD Annually Description: We are looking for a Senior Analog/Mixed Signal ASIC Design Engineer to join our Silicon Architecture Group. In this role, you will lead end-to-end integrated circuit design-from conceptual development through implementation, verification, and delivery. You will play a pivotal role in architecting, modeling, and optimizing mixed-signal ASICs, ensuring efficient designs that balance analog and di

DFX RTL Design Engineer - Specialized (US)

Sunrise Systems, Inc.

Santa Clara, California, USA

Contract

DFX RTL Design Engineer - Specialized (US) Santa Clara, CA - 95054 6 Months candidate must be able to come onsite to San Jose, CA 3 days per week OB DUTIES: This is a position for senior level RTL design engineer. As a part of the design team, candidate will be exposed to several IPs including Gbit SERDES, UCIe, PCIe I/F & high frequency design. Successful candidates will be participating in the DFX RTL coding/integration of leading edge I/O SoC in 3 nm processes. This DFX RTL Design Engineer

ASIC Engineer, Formal Verification

Veear

Sunnyvale, California, USA

Contract

Requirements: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.5+ years of experience in Formal VerificationExperience with Formal Verification applications including Datapath, sequential equivalence, Xprop, Clock Gating, connectivity etcProven understanding of Formal Verification methodologies, complexity reduction techniques and abstraction techniquesProven analytical skills to craft Client solutions to tackle industry-le

Senior Analog/Mixed Signal ASIC Design Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: We are seeking a Senior Analog/Mixed Signal ASIC Design Engineer to join our team in the Silicon Architecture group. Members of our group lead the design of integrated circuits from conceptual phases through detailed design, implementation, verification, test and delivery to our customers. Designers in the Silicon Architecture group are responsible for developing initial architectural concepts and vetting them through modeling, analysis, and simulation. We work with both

ASIC & FPGA Design Engineering

Judge Group, Inc.

Orlando, Florida, USA

Full-time

Location: Orlando, FL Description: Role - Asic & Fpga Design Engineering Type: Contract Location - ( Onsite) Job Description: Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses spe

UVM Digital Verification Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Design and simulate circuits at transistor-level to implem

CPU Verification ENgineer

TalentBridge

Menlo Park, California, USA

Contract

CPU/SOCS VERIFICATION ENGINEER Location: Menlo Park, CA 94025 ( 5 Days onsite ) Duration: 12 months + extension Job Summary: As a CPU Verification Engineer, you will be a key member of the design verification team at to deliver our high-quality next generation AI integrated, cloud-native server class SoCs. You will be responsible for defining verification strategies and architecting solutions for complex verification problems. You will partner with stakeholders in adjacent domains and enable

Principal UVM Digital Verification Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced Principal UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Independently drive solutions to complex problem

Senior UVM Digital Verification Engineer

Draper

Boston, Massachusetts, USA

Full-time

Job Description Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Job Description: Duties/Responsibilities Performs analysis approaches for a particular probl

Sr. Software Engineer

Robert Half

Manchester, New Hampshire, USA

Full-time

Description We're looking for a sharp FPGA Software Engineer to join our hardware-software integration team. You'll design, implement, and optimize high-performance logic for FPGAs that drive our advanced embedded systems. What You'll Do: Develop and simulate FPGA designs using VHDL/Verilog or SystemVerilog.Integrate FPGA code with embedded software and hardware platforms.Collaborate with cross-functional teams on system architecture and performance tuning.Test and debug designs in both simulat