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Silicon Digital Design Engineer IV

Ascendion Inc.

Redmond, Washington, USA

Full-time

About Ascendion Ascendion is a full-service digital engineering solutions company. We make and manage software platforms and products that power growth and deliver captivating experiences to consumers and employees. Our engineering, cloud, data, experience design, and talent solution capabilities accelerate transformation and impact for enterprise clients. Headquartered in New Jersey, our workforce of 11,000+ Ascenders delivers solutions from around the globe. Ascendion is built differently to e

Clock Distribution Engineer

Tesla Motors

Fort Collins, Colorado, USA

Full-time

The Dojo Hardware team is looking for a Clock Distribution Engineer to work in Fort Collins, CO. This Engineer will be responsible for the design and implementation of clocks at both the SOC and IP level. Responsibilities Design custom clock distribution from PLL to sub-blocks meeting low latency and jitter specs for various SOC clocks Write modular clock RTL to handle changes, integrating it into designStrong tcl knowledge to automate the clock tree generation based on bottoms-up load feedback

RTL Engineer: Integrate RISC-V Core to SoC

Intelliswift Software Inc

Santa Clara, California, USA

Contract

Job Title: RTL Engineer: Integrate RISC-V Core to SoC Location(s): Santa Clara, CA - Onsite Must Have skills: 5+ years of experience in RTL design, SoC integration, or related areas.Strong hands-on experience with hardware description languages (Verilog, SystemVerilog, VHDL), EDA tools, and simulators (VCS, NC, Verilator).Deep understanding of SoC design, integration, and high-performance interfaces (e.g., AXI, TileLink, PCIe, Ethernet).Proven ability to debug and optimize designs for functiona

Senior Design Verification Engineer - Ethernet PHY/PCS

Sivaltech

Santa Clara, California, USA

Contract, Third Party

Job Title: Senior Design Verification Engineer - Ethernet PHY/PCS Location: Santa Clara, CA Job Type: Contract, Full-time Experience: 7+ years We're seeking an experienced Senior Design Verification Engineer with expertise in Ethernet PHY or PCS to join our team in Santa Clara, CA. Responsibilities: - Develop and execute verification plans for Ethernet PHY or PCS - Create and maintain testbenches and test suites - Collaborate with design engineers to resolve verification issues - Strong understa

Sr. Formal Verification Engineer, Dojo

Tesla Motors

Palo Alto, California, USA

Full-time

Tesla's Dojo Silicon Development Team is looking for a Formal Verification Engineer to develop and manage the formal verification and test environments, working closely with the architect, design, and simulation verification team to achieve high quality tape-out. We are looking for the best talent to work on state-of-the-art chip designs, where your limit is only your imagination. You will work with a team of highly talented engineers who are focused on advancing Tesla's AI mission. If you love

Senior Front-End ASIC Engineer

DivTek Global Solutions Inc.

San Jose, California, USA

Full-time

Job Title: Senior Front-End ASIC Engineer Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Job Description Our client is seeking a Senior Front-End ASIC Engineer to join their elite engineering team. This is a unique op

Sr. DFT Verification Engineer, Dojo

Tesla Motors

Fort Collins, Colorado, USA

Full-time

Tesla's Silicon Development Group is looking for a Design-for-Test (DFT) Design Verification Engineer to work on custom ASICs. You will drive state of the art in the area of testability and contribute to product coverage and quality by verifying the DFT features pre-silicon and by delivering test content for post-silicon. Responsibilities Create Verilog/System Verilog/UVM test benches to verify various DFT features in RTL such as SSN, compressed and uncompressed scan, memory BIST, JTAG, and bou

Wireless Modem Verification Engineer (Silicon Engineering)

SpaceX

Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. WIRELESS MODEM VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink

Sr. Analog/Mixed-Signal Verification Engineer (Silicon Engineering)

SpaceX

Redmond, Washington, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. ANALOG/MIXED-SIGNAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

FPGA Design Engineer

Lockheed Martin Corporation

Orlando, Florida, USA

Full-time

Job Description You will be the FPGA Design Engineer for Lockheed Martin Missiles and Fire Control (MFC), a recognized designer, developer, and manufacturer of precision engagement aerospace and defense systems for the U.S. and allied militaries. Our team is responsible for developing and manufacturing advanced products for military customers, including the U.S. Army, Navy, Air Force, Marine Corps, and NASA. What You Will Be Doing As a FPGA Design Engineer, you will be responsible for developi

Silicon Design Engineer

Infobahn Softworld Inc.

Boxborough, Massachusetts, USA

Contract

THE ROLE: The candidate will be a member of the Memory I/O design team designing High Speed IO circuits and implementing DDR IPs. The focus of the activity will be centered around spice simulations and behavior modeling. The supporting team is an established group of talented Analog/Mixed-Signal integrated circuit designers. The site includes the direct supervisor, AMS manager, IP director, and majority of the AMS team. REQUIREMENTS: Circuit simulation with hspice/spectreCircuit behavioral model

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

Redmond, Washington, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

FPGA/ASIC Verification Engineer (Silicon Engineering)

SpaceX

Sunnyvale, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is th

Sr. DFT Verification Engineer, Dojo

Tesla Motors

Austin, Texas, USA

Full-time

Tesla's Silicon Development Group is looking for a Design-for-Test (DFT) Design Verification Engineer to work on custom ASICs. You will drive state of the art in the area of testability and contribute to product coverage and quality by verifying the DFT features pre-silicon and by delivering test content for post-silicon. Responsibilities Create Verilog/System Verilog/UVM test benches to verify various DFT features in RTL such as SSN, compressed and uncompressed scan, memory BIST, JTAG, and bou

Design Verification Engineer

Mirafra Inc

San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

Design verification Engineer

Enfycon Inc

Remote or Mountain View, California, USA

Contract

Minimum Qualifications: Design Verification Engineering ServicesTestbench development System Verilog Universal Methodology (UVM), Python, and C testsIntegration/development of C tests/Application Programming Interface (APIs) and software build flowIntegration of UVM testbenchesTest development and debug, including without limitation tests for functionality, power, performance, error, and connectivity, both for RTL and Gate Level Netlist Design Under Test, tests for functional and code coverage

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Design Engineer 3 - ASIC

Amarx Search, Inc.

Remote

Contract

Amarx Search, Inc. - amarx.com 12+ Month W-2 Contract position in -, Remote Pay: $75.50 to $98 per hour Position ID: 2663 An excellent position with a large international defense / aerospace company * Design Engineer 3 - ASIC * Please apply ONLY if you a BSEE or BSEE and 8+ years of experience United States Citizenship is required due to government contract requirement; we are unable to sponsor at this time. We can ONLY consider your application if you have: 1: Bachelor's degree in Electrical o

Principal Design Verification Engineer

OSI Engineering, Inc.

San Jose, California, USA

Full-time

Principal Design Verification Engineer A leading chip and silicon IP provider focused on accelerating and securing data is looking to hire an outstanding Principal Design Verification Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This role offers the chance to work alongside top engineering talent on innovative products that push the boundaries of speed and data security. As a Principal Design Verification Engineer, you ll play a critical role in the development of MIC p

Sr Firmware Engineer/Electrical Engineer

Lockheed Martin Corporation

Moorestown, New Jersey, USA

Full-time

Job Description What We're Doing As a part of the Lockheed Martin community, we take on challenges and find solutions using creativity and collaboration. If you're looking to be a part of a passionate team solving these complex problems, then Rotary and Mission Systems is the place for you. The Work This position requires experience in selecting and designing Electronic IO assemblies. This entails requirements review, component selection, creation of design packages, generation of test procedu