Timing closure jobs in mountain view, ca

Mountain View, California

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14d ago

Position 1 Physical Design Engineer Mountain View CA (onsite - Hybrid) Mode of hiring: Fulltime permanent Customer wants someone who is having some logical design experience along with PD experience. Having some RTL2PD flow skills such as CDC/RDC/VCLP is preferred. Having some exposure of logic design is also preferred. Canddiate doesn't have to do the logic design, but needs to review the synthesis/PNR report to analyze for the timing/LoL optimization Provides services in transforming the RTL d

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Full-time

$120,000 - $140,000

Physical Design Engineer (Top-Level / Full-Chip) - AS

San Jose, California

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Yesterday

Title: Physical Design Engineer/ ASIC Implementation Engineer (Strong Top-Level / Full-Chip Physical Design and Implementation experience) Location: San Jose, CA (Onsite role) Type: FTE Permanent role Note from Hiring manager: Candidate either should have good experience on Chip level/Top level design Or if they are extremely strong in one of the other aspects of design e.g. STA (Static Timing Analysis) or Floor Planning in chip design, they can still be considered. Only in those cases where y

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Full-time

Depends on Experience

Physical Design Engineer

Palo Alto, California

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14d ago

Position: Physical Design Engineer Location : Palo Alto, CA (Full Onsite) Rate : 90-100/hr Client : HCL/Tesla Job ID : 166019 Number of Positions : 5 JD for PD: Exposure to TSMC 2NP/3NP is mustPerform endtoend physical design flow:FloorplanningPower planning (PG grid, IR)Placement & optimizationCTS (Clock Tree Synthesis)RoutingPostroute optimizationAchieve timing closure across all modes and cornersResolve DRC, LVS, ERC and signoff violationsHandle lowpower design techniques:MultiVt, Multivolta

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Contract

Depends on Experience

Physical Design Engineer Semiconductor / ASIC

Hybrid in Palo Alto, California

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Today

Physical Design Engineer Semiconductor / ASIC Location: Palo Alto, CA (100% Onsite) Openings: 5 Job Overview We are looking for an experienced Physical Design Engineer with strong hands-on expertise in end-to-end ASIC physical design and advanced semiconductor process nodes. The ideal candidate must have exposure to TSMC 2NP/3NP technology and proven experience in physical implementation, timing closure, power optimization, and physical verification. Key Responsibilities Execute the complete phy

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Contract

$70 - $90

Senior FPGA Engineer

San Jose, California

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Today

#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Senior FPGA Engineer in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in? Your role Key responsibilities in your new role Architect and implement FPGA solutions forprototyping platform and

Full-time

USD 91,600.00 - 126,000.00 per year

FPGA Engineer

Sunnyvale, California

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Today

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprise

Full-time

Senior Principal Engineer

Remote or San Jose, California

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Today

Job Details: Job Description: Altera is looking for a Senior Principal Engineer to serve as a key technical leader responsible for defining and advancing FPGA physical synthesis, timing optimization, and implementation methodologies. This individual will bring deep expertise in EDA algorithms, optimization engines, design compilation, and performance-driven implementation technologies. The ideal candidate will have a proven track record of architecting and delivering breakthrough technologies

Full-time

USD 231,500.00 - 304,500.00 per year

CPU STA CAD Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: NUVIA is now part of Qualcomm. Our mission is to reimagine silicon and create computing platforms that will transform the industry. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. As CPU STA CAD engineer, you will build and su

Full-time

USD 209,300.00 - 313,900.00 per year

Sr Solutions Engineer-FPGA/PCIe

San Jose, California

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Today

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Joi

Full-time

USD 175,000.00 per year

FPGA Design Engineer

Santa Clara, California

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Today

Company Description Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital la

Full-time

USD 110,000.00 - 170,000.00 per year

Principal Silicon Engineer

Mountain View, California

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Today

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and complian

Full-time

USD 142,800.00 - 274,800.00 per year

Sr Principal Software Engineer, Innovus - Physical Synthesis & Optimization

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Why Cadence? - Design for AI. AI for Design. Cadence sits at the intersection of semiconductor innovation and high-performance computing. Through Design for AI, our EDA technologies enable the advanced silicon platforms powering modern AI infrastructure. Through AI for Design, we integrate machine learning, data-driven optimization, and intelligent automation into our industry-leading i

Full-time

USD 161,000.00 - 299,000.00 per year

FPGA Design and Prototyping Engineer

San Jose, California

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Today

Full-time

USD 145,600.00 per year

Field Applications Engineer (FAE)

San Jose, California

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Today

Job Details: Job Description: Altera is seeking a highly skilled Field Applications Engineer (FAE) to support customers adopting our industry-leading FPGA, SoC, and embedded solutions. In this role, you will partner closely with customers, sales teams, and product engineering to drive successful design-ins, accelerate time-to-market, and ensure customers realize the full value of Altera's technology portfolio. This is a customer-facing, technically deep role ideal for engineers who enjoy sol

Full-time

USD 187,000.00 - 270,700.00 per year

Synthesis & STA Engineer - High-Speed SerDes

San Jose, California

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Today

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

Full-time

USD 160,000.00 - 200,000.00 per year

DFT Lead Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT spe

Full-time

USD 143,800.00 - 230,000.00 per year

Principal Emulation Engineer

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 219,000.00 - 351,000.00 per year

ASIC DFT Engineer

Palo Alto, California

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Today

About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we constantly challenge what's possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it

Full-time

Compensation information provided in the description

Sr. Staff Embedded Firmware/FPGA Systems Engineer

Milpitas, California

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Today

As a result of the combination of the BD Biosciences and Diagnostic Solutions business with Waters Corporation (NYSE: WAT), by applying to this role, you will be applying for a position with Waters. Waters is a global leader in life sciences, dedicated to accelerating the benefits of pioneering science through analytical technologies, informatics, and service. With a focus on regulated, high-volume testing environments, Waters' innovative portfolio harnesses deep scientific expertise across biol

Full-time

USD 168,600.00 - 269,800.00 per year

Senior Director, Silicon Hardware Engineering - Boards, Packaging, & Reliability

San Jose, California

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Today

Job Details: Job Description: About Altera At Altera , our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster,

Full-time

USD 231,500.00 - 335,000.00 per year

Timing closure jobs in Mountain View, CA, USA