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Palo Alto, California

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Today

Title: ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of complex SoC subsystems, driving architecture, RTL implementation, and tapeout. Focus on high-performance Datapath, PPA optimization, and cross-functional integration across silicon, firmware, and system teams. Must haves: 8 12+ years in ASIC/SoC digital design with hands-on RTL ownershipStrong Sy

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Contract

$80 - $100

Integration RTL Design Engineer

San Jose, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 145,600.00 per year

ASIC/SoC Verification Engineer

Palo Alto, California

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Today

Title: ASIC/SoC Verification Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Onsite Length of contract: 6 months+ (Temp-to-Perm) Ideal Start Date: 6/1/2026 Responsibilities: Lead verification for complex SoC subsystems using Python-based frameworks (Cocotb), with a focus on DSP validation, scalable test environments, and full verification closure through tapeout. Must haves: 8+ years in ASIC/SoC digital verificationStrong experience with Python-based verification (Cocotb preferr

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Contract

$80 - $100

Senior ASIC/RTL Modem Engineer

Santa Clara, California

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Today

Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the wireless Modem design, verification and RTL implementation. Works with Hardware, Verification and Systems teams for bit-exacting testing of wireless modems for the delivery of cutting edge mobile products across established wireless standard/protocol in the mobile, networking, computing a

Full-time

USD 171,138.00 - 190,100.00 per year

Lead ASIC DFT Engineer

San Jose, California

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26d ago

Role: Lead ASIC DFT Engineer Location: San Jose, CA (Remote, PST time zone preferred) Work Setup: Remote, PST time zone preferred Experience Required: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) DFT Architecture definition. Must Full chip / Sub system level DFT activities Must Scan & compression (EDT) implementation Must LBIST implementation and verification any BIST exp is Must Coverage improvements (Spyglass work) Must ATPG Good to Have Role Summar

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Full-time, Contract, Third Party

Depends on Experience

ASIC Physical Design Engineer

San Jose, California

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Today

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Great base pay, bonus, terrific benefits and exceptional 401k! he MissionStaffRight Associates is recruiting to identify a high-caliber ASICPhysical Design Engineer to spearhead the structural realization of next-generation System-on-Chip (So

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Full-time

170000 - 220000

Senior ASIC Design Engineer - Clocks IP

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life's work, to amplify human

Full-time

USD 136,000.00 - 218,500.00 per year

Staff/Principal Engineer. ASIC Design Verification (DDR expert)

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Position Title: Staff/Principal ASIC SoC Design Verification Engineer - DDR expert (Technical role) Position Description: This is a position for Staff technical member of Micron's

Full-time

USD 168,000.00 - 336,000.00 per year

Principal Engineer, SOC Design

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 219,000.00 - 351,000.00 per year

Staff/Principal Engineer - Design Verification (SoC expert/lead)

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Position Title: ASIC Design Verification SoC Lead (Technical lead role) Position Description: This is a position for lead member in Micron's ASIC Verification and Emulation group. T

Full-time

USD 168,000.00 - 336,000.00 per year

Principal Firmware Engineer - high-speed optical interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

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Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 154,680.00 - 231,700.00 per year

Senior ASIC Design Architect

San Jose, California

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Today

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Base pay, bonus, outstanding retirement programs! The MissionStaffRight Associates has been retained to lead an exclusive search for a Senior ASIC Design Architect to spearhead the development of custom, high-performance silicon for next-gene

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Full-time

180000 - 230000

ASIC & FPGA Design Engineer

Remote or Orlando, Florida

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Today

Job Description You will be the FPGA/ASIC Design Engineer for the Advanced Programs area. Our team accelerates high performance hardware development by partnering with cross functional engineers to move concepts through design, procurement, testing, and the Design Assurance process. What You Will Be Doing As the FPGA/ASIC Design Engineer you will own the end to end creation of complex FPGA and ASIC solutions-defining specifications, architecting designs, verifying functionality, and implementi

Full-time

USD 101,000.00 - 178,135.00 per year

ASIC Verification Engineer

Santa Clara, California

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Today

Position:ASIC Verification Location:Santa Clara CA & Austin, TX Contract/ Fulltime Job Responsibilities: Architect and develop verification environment, testbench components, and reference models for designs at block and system level.Develop a comprehensive test plan and implement test cases.Verify design in block and chip-level environments using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification.Perform RTL code coverage, assert

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Full-time

Depends on Experience

ASIC & FPGA Design Engineer Sr

Remote or Orlando, Florida

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Today

Job Description You will be the Senior ASIC & FPGA Design Engineer for the Multi Domain Missile Warning Payload team. Our team creates large format, high frame rate imaging sensor systems that provide survivability enhancing situational awareness for air, space and surface platforms. What You Will Be Doing As the Senior ASIC & FPGA Design Engineer you will work side by side with a PLD subject matter expert to architect, design and implement programmable logic solutions for the imaging sensor s

Full-time

USD 101,000.00 - 178,135.00 per year

ASIC & FPGA Design Engineer Senior

Remote or Orlando, Florida

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Today

Job Description You will be the Senior ASIC & FPGA Design Engineer for the Laser Weapon System (LWS) Turret Closing team. Our team is responsible for delivering high performance, low latency FPGA based closed loop motor control solutions that enable rapid, precise turret positioning for next generation directed energy weapons. What You Will Be Doing As the Senior ASIC & FPGA Design Engineer you will lead the end to end development of the FPGA motor control hardware, translating system level pe

Full-time

USD 101,000.00 - 178,135.00 per year

PDK and CAD Support Engineer - Integrated Circuit Design (ASIC and MMIC)

Remote or New Hampshire

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30+d ago

Date Posted: 2026-03-12 Country: United States of America Location: US-NH-REMOTE Position Role Type: Remote U.S. Citizen, U.S. Person, or Immigration Status Requirements: Security Clearance Type: None/Not Required Security Clearance Status: Not Required At RTX, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering

Full-time

USD 107,500.00 per year

ASIC Implementation Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is searching for a Physical Design Engineer to join the ASIC Products Division. This position involves working with the latest technology to continue driving next generation AI designs. This position will require in-depth knowledge and experti

Full-time

USD 120,000.00 - 192,000.00 per year

PNR Applications Engineer, Staff

Sunnyvale, California

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Today

Descriptions & Requirements Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. Business Area Description: O

Full-time

ASIC & FPGA Design Engineer Sr / Syracuse, NY

Remote or Liverpool, New York

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Today

Job Description What We're Doing At Lockheed Martin, we are passionate about innovation and integrity. We believe that by applying the highest standards of business ethics and forward-thinking, everything is within our capacity - and yours as a Lockheed Martin employee. Lockheed Martin values your skills, training, education, and background! The Work As an FPGA Engineer you will; Perform complex FPGA firmware architecture and/or custom digital board designs. Design digital signal processing, m

Full-time

USD 101,000.00 - 178,135.00 per year

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