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Dallas, Texas

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Today

Role: Design Verification Engineer Locations: Bay Area, CA | Austin, TX | Dallas, TX Contract Role Overview You will be responsible for architecting and executing advanced verification strategies for next-generation SoC designs, including RISC-V cores, cache-coherent subsystems, and high-performance compute units. The ideal candidate will have strong experience in datapath verification, formal tools, and system-level integrations. We are looking for highly skilled engineers who can operate ind

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Contract, Third Party

$Negotiable

Senior Design Verification Engineer

Remote

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Today

Design Verification (DV) Engineer Key Responsibilities Develop and maintain UVM-based SystemVerilog testbenchesCreate reusable verification components and environmentsDevelop and execute verification plans for subsystem and block levelDebug RTL issues and collaborate closely with designContribute to end-to-end validation flowsDrive coverage closureRequired Qualifications Strong hands-on expertise in UVM and SystemVerilogExperience with ARM-based protocols including:APBAXI (no CHI/coherency requi

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Contract

90 - 100

Senior Design Verification Engineer - Chip level

San Diego, California

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6d ago

Job Title: Design Verification Engineer Location: CA Experience Level: 10+ Years Job Description: We are seeking a skilled Design Verification Engineer with strong expertise in System Verilog (SV) and UVM methodologies to join our team. The ideal candidate will have hands-on experience in developing, updating, and debugging verification testbenches, with the ability to integrate Verification IPs (VIPs) or Design IPs into the verification environment. Responsibilities: Develop, enhance, and debug

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Third Party, Contract

160,000 - 180,000

GPU Design verification Engineer

Austin, Texas

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16d ago

Position Details Description: Help develop comprehensive verification plans, define verification goals, coverage metrics, and sign-off criteria aligned with architectural specifications and integration requirements.Architect and implement advanced verification environments by designing, developing, and maintaining scalable verification testbenches using System Verilog, UVM, and C++, developing test code in parallel with RTL and applying constrained-random testing, coverage-driven verification, a

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Contract

$90 - $100

Principal Design Verification Engineer (NPU)

Hybrid in Mountain View, California

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13d ago

Role: Location: Mountain View., California (Hybrid) Project descriptionThe Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards.This role is responsible for driving the verification excellence of state-of-the-art Neural Processing Unit (NPU), including the

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Third Party, Contract

Depends on Experience

GPU Design Verification Engineer

San Jose, California

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16d ago

Job Title: GPU Design Verification Engineer Location: San Jose, CA (Onsite) Duration: 6+ months (Contract) with the possibility of extension Job Description: We are seeking a highly skilled Design Verification Engineer to join our team at Samsung SARC/ACL. The successful candidate will be responsible for verifying the functionality and performance of our cutting-edge GPU designs. Your primary focus will be on developing and executing verification plans, creating testbenches, and debugging compl

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Contract

$80 - $90

Hardware Design/Verification Engineer (FPGA, UVM)

Marlborough, Massachusetts

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Today

RESPONSIBILITIES: Kforce's client, a growing technology company delivering innovative communications products and services worldwide, is seeking an experienced Hardware Design/Verification Engineer (FPGA, UVM) in Marlborough, MA. In this role, the Hardware Design/Verification Engineer will work alongside a collaborative team of engineers developing the next generation of advanced communications systems. Key Responsibilities: * Develop and maintain verification environment in SystemVerilog/UVM *

Full-time

$160,000 - $200,000 annually

Design Verification Engineer (GPU)

San Jose, California

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Today

Job Title: "Design Verification Engineer (GPU)" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date I UVM version will place you among

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Contract

Depends on Experience

FPGA Design/Verification Engineer (Hybrid)

Owego, New York

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Today

Location: Owego, NY Salary: $70.00 USD Hourly - $80.00 USD Hourly Description: Job Title: FPGA Design/ Verification Engineer Duration: 6+ Months Location: Owego, NY (Hybrid), a bility to work remotely occasionally Shift: 4/10A-1st Shift Job Description: The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communic

Contract

USD 70.00 - 80.00 per hour

FPGA Design/Verification Engineer

Sunnyvale, California

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Today

Location: Sunnyvale, CA Salary: $90.00 USD Hourly - $100.00 USD Hourly Description: Job Title: FPGA Design/Verification Engineer Duration: 6+ Months (Possible Extension) Location: Sunnyvale, CA, Possible: onsite Denver CO. Job Description: The selected candidate will be responsible for ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert. This engineer with have experience: -Verifying FPGA and/or ASIC designs including creating UVM verification environ

Contract

Compensation information provided in the description

Principal Engineer, Design Verification (NPU)

Hybrid in Mountain View, California

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6d ago

Title: Principal Engineer, Design Verification (NPU) Location: Mountain View, California -Hybrid Occasional travel may be required, less than 5% Project Description: The Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards. This role is responsible for dri

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Contract

Depends on Experience

Digital Design Verification Engineer

San Jose, California

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5d ago

JD Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, Cadence tools Xcelium, Windows based tools.

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Contract

Depends on Experience

Staff GPU Design Verification Engineer

Austin, Texas

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20d ago

Job Description LeadStack Inc. is an award winning, one of the nation's fastest growing, certified minority owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. Job Title: Staff GPU Design Verification Engineer W2 only Location:Austin, TX (Onsite) Contract Duration:6+ months Pay Rate:$87$108/hr

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Contract

85 - 108

Principal Design Verification Engineer (NPU)

Hybrid in Mountain View, California

•

Today

Project Description: The Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards. This role is responsible for driving the verification excellence of state-of-the-art Neural Processing Unit (NPU), including the development of comprehensive testbenches and vali

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Contract

$80 - $90

Senior Mechanical Engineer Ruggedized IoT Product Design (Project-Based)

Austin, Texas

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Today

Senior Mechanical Engineer Ruggedized IoT Product Design (Project-Based) Location: Austin, Texas (Local preferred) Engagement: Project-based Job Description Role Overview We are looking for an experienced mechanical engineer to lead the design and implementation of next-generation rugged IoT enclosures and tooling. This role replaces the need for a third-party design agency and requires hands-on experience bringing industrial products from concept to production. Key Responsibilities Design rug

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Part-time

Depends on Experience

Design Verification Engineer

San Jose, California

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2d ago

Role: Design Verification Engineer Location: San Jose CA/ Irvine CA / San Diego CA Job Description:Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simula

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Full-time

Depends on Experience

Senior FPGA/ASIC Design /Verification Engineer (Onsite)

Cedar Rapids, Iowa

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Today

Date Posted: 2026-01-27 Country: United States of America Location: US-IA-CEDAR RAPIDS-193 ~ 1120 Collins Rd NE ~ BLDG193 Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: Security Clearance Type: None/Not Required Security Clearance Status: Not Required Are you interested in becoming part of a growing Avionics FPGA/ASIC team? This position is for a highly experienced, highly motivated Electrical or Computer Engineer that will be involved in the design

Full-time

USD 86,800.00 per year

Control Fabric Design Verification Engineer

Folsom, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 121,940.00 per year

GPU Design Verification Engineer_Austin, TX/SanJose, CA(Onsite)_Only Xoriant W2

Austin, Texas

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Yesterday

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- GPU Design verification Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (Will get extend) MODE OF INTERVIEW Onsite RATE As per market only Xoriant W2 (No Vendor employees) JOB DESCRIPTION We are looking for an experienced

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Contract

$70 - $80

Front-End Infrastructure Engineer (RTL/Design Verification)_Austin, TX (Onsite)_ only Xoriant W2

Austin, Texas

•

Yesterday

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- Front-End Infrastructure Engineer (RTL/Design Verification) LOCATION Austin , TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW onsite RATE As per market (Only Xoriant W2 , no Vendor Employees) JOB DESCRIPTION The

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Contract

$70 - $90

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