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San Jose, California

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Today

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Great base pay, bonus, terrific benefits and exceptional 401k! he MissionStaffRight Associates is recruiting to identify a high-caliber ASICPhysical Design Engineer to spearhead the structural realization of next-generation System-on-Chip (So

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Full-time

170000 - 220000

Physical Design Engineer

San Jose, California

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Today

Job Title: Physical Design Engineer Location: Sanjose CA/ Santa Clara CA Long Term Contract Job Description:We are hiring a Physical Design Engineer with hands-on experience in ASIC/SoC design using Cadence tools. The candidate will be responsible for end-to-end physical design flow including floorplanning, placement, CTS, routing, and timing closure. Key Responsibilities: Execute physical design stages: floorplan, placement, CTS, routing, signoffPerform timing closure (setup/hold), congestion,

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Contract

Depends on Experience

Lead ASIC DFT Engineer

San Jose, California

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19d ago

Role: Lead ASIC DFT Engineer Location: San Jose, CA (Remote, PST time zone preferred) Work Setup: Remote, PST time zone preferred Experience Required: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) DFT Architecture definition. Must Full chip / Sub system level DFT activities Must Scan & compression (EDT) implementation Must LBIST implementation and verification any BIST exp is Must Coverage improvements (Spyglass work) Must ATPG Good to Have Role Summar

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Full-time, Contract, Third Party

Depends on Experience

Senior ASIC Design Architect

San Jose, California

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Today

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Base pay, bonus, outstanding retirement programs! The MissionStaffRight Associates has been retained to lead an exclusive search for a Senior ASIC Design Architect to spearhead the development of custom, high-performance silicon for next-gene

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Full-time

180000 - 230000

Senior ASIC Design Engineer - Clocks IP

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life's work, to amplify human

Full-time

USD 136,000.00 - 218,500.00 per year

Staff/Principal Engineer. ASIC Design Verification (DDR expert)

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Position Title: Staff/Principal ASIC SoC Design Verification Engineer - DDR expert (Technical role) Position Description: This is a position for Staff technical member of Micron's

Full-time

USD 168,000.00 - 336,000.00 per year

Principal Firmware Engineer - high-speed optical interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

•

Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 154,680.00 - 231,700.00 per year

ASIC Verification Engineer

Santa Clara, California

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Yesterday

Position:ASIC Verification Location:Santa Clara CA & Austin, TX Contract/ Fulltime Job Responsibilities: Architect and develop verification environment, testbench components, and reference models for designs at block and system level.Develop a comprehensive test plan and implement test cases.Verify design in block and chip-level environments using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification.Perform RTL code coverage, assert

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Full-time

Depends on Experience

Senior ASIC/RTL Modem Engineer

Santa Clara, California

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Today

Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the wireless Modem design, verification and RTL implementation. Works with Hardware, Verification and Systems teams for bit-exacting testing of wireless modems for the delivery of cutting edge mobile products across established wireless standard/protocol in the mobile, networking, computing a

Full-time

USD 171,138.00 - 190,100.00 per year

ASIC Implementation Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal int

Full-time

USD 141,300.00 - 226,000.00 per year

Lead ASIC DFT Engineer

Hybrid in San Jose, California

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7d ago

Job Title: Lead ASIC DFT Engineer Location: San Jose, CA - Must Be Able To Go In Office Once Or Twice A Month Duration: Long term Experience Required: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary: We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, bo

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Contract

Depends on Experience

ASIC Verification Engineer

Santa Clara, California

•

Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 103,600.00 per year

Verification Engineer - FPGA/ASIC

San Jose, California

•

Today

Full-time

USD 124,040.00 per year

Principal ASIC Engineer

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Play a key role in architecture and development of advanced verification environments for complex SoC components, while ensuring on time, one time best-in-class quality. Work in the field of Semico

Full-time

USD 233,157.00 - 336,000.00 per year

Senior Staff Firmware Engineer - low-level firmware/software for advanced Compute, Storage, and Custom ASIC platforms.

Santa Clara, California

•

Today

Full-time

USD 131,010.00 - 196,300.00 per year

Senior ASIC DV Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: Architecting block and full-chip verification e

Full-time

USD 141,300.00 - 226,000.00 per year

Sr. Staff ASIC Verification Engineer

Palo Alto, California

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Today

About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we constantly challenge what's possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it

Full-time

USD 237,000.00 - 296,000.00 per year

ASIC Methodology Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: The DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal and external EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology, and IP, and foundation IP development. About the Role As a member of the DTECH

Full-time

USD 153,200.00 - 229,800.00 per year

Staff/Principal Engineer - Design Verification (SoC expert/lead)

San Jose, California

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Position Title: ASIC Design Verification SoC Lead (Technical lead role) Position Description: This is a position for lead member in Micron's ASIC Verification and Emulation group. T

Full-time

USD 168,000.00 - 336,000.00 per year

Staff Firmware Engineer - high-speed interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

•

Today

Full-time

USD 111,070.00 - 166,400.00 per year

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