San Jose, California
•
5d ago
seeking a highly experiencedSenior Staff CAD Engineerto lead and advance EDA design flows, CAD infrastructure, and signoff methodologies for next-generation semiconductor products. This individual will serve as the technical authority for advanced-node IC design environments, enabling successful development and tapeout of RF, Analog, High-Speed IO, and Digital SoC designs on cutting-edge FinFET technologies. The ideal candidate will have deep expertise in advanced-node PDK management, Cadence de
Easy Apply
Contract
90 - 100










