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San Jose, California

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Today

Job Title : Validation Engineer (PCIE) Location : San Jose, CA (Onsite) Key skills: Zebu, FPGA , PCIe(All generations) , PCIE Serdes, ARM Higly Skilled Engineer to work on validating and debug the the ULTRA low power designs on emulation and post silicon platforms. Develop and execute test plans in C to validate the Features. In depth knowledge of one or more peripheral protocols and specifications Bare metal/Linux driver development, Firmware development experience and excellent C programming

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Full-time, Part-time, Third Party, Contract

PCIe Validation Engineer :: Onsite-CA :: C2C/W2

San Jose, California

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Today

PCIe Validation Engineer Location: San Jose, CA (Onsite) Key Skills Zebu Emulation PlatformFPGA ValidationPCIe (All Generations Gen3/Gen4/Gen5/Gen6)PCIe SerDesARM ArchitectureEmbedded Systems ValidationPost-Silicon ValidationFirmware DevelopmentLinux Driver DevelopmentC ProgrammingPython ScriptingJob Summary We are seeking a highly skilled PCIe Validation Engineer to validate and debug ultra-low-power designs on emulation and post-silicon platforms. The ideal candidate will have strong expertis

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Contract

Depends on Experience

Senior Staff Software Engineer-PHY layer concepts (e.g., SERDES, USB, PCIe, Ethernet) / Validation Infrastructure

Santa Clara, California

•

Yesterday

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 131,010.00 - 196,300.00 per year

Testing Engineer IV - PCIe

Sunnyvale, California

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Yesterday

About the Role: We are seeking an experienced and highly technical Hardware Verification & Validation Engineer to drive the end-to-end testing of our cutting-edge ASIC designs. In this dynamic role, you will bridge the gap between pre-silicon verification and post-silicon lab validation. You will architect robust UVM testbenches for next-generation PCIe interfaces and lead hands-on silicon bring-up in the lab. If you have deep expertise in high-speed IO and thrive in cross-functional debugging e

Full-time

USD 98,040.00 - 154,800.00 per year

Field Application Engineer/CXL/PCIe/Sunnyvale

Sunnyvale, California

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Today

Field Application Engineer - CXL Ecosystem Vendors Location: 5 days onsite in Sunnyvale, CA Employment Type: Full-time We are seeking a Field Application Engineer to support adoption and deployment of advanced CXL-based computational memory solutions across leading ecosystem partners. This role sits at the intersection of customer engineering, validation, and product integration, working closely with both U.S. and South Korea leadership. Responsibilities Act as the primary technical interface

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Full-time

$150000 - $250000

Principal Product Application Engineer - PCIe

San Jose, California

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Yesterday

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

Full-time

USD 170,500.00 - 220,000.00 per year

Senior Firmware Engineer - PCIe/CXL Memory Solutions

San Jose, California

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Yesterday

Full-time

USD 147,000.00 per year

Senior FPGA/Emulation Validation Engineer

San Jose, California

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8d ago

Title: Senior FPGA/Emulation Validation Engineer Location: San Jose, CA, USA Duration: Full-time OR C2H Department: Verification Job Description The Senior FPGA/Emulation Validation Engineer position is your opportunity to join one of the industry s leading companies in platform security management and ransomware detection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about SOC architecture, and emulation and prototyping platforms.

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Full-time

Depends on Experience

Senior FPGA/Emulation Validation Engineer

San Jose, California

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29d ago

Greetings from Aziro.Senior FPGA/Emulation Validation Engineer San Jose, CA, USA Full-time Department: VerificationJob DescriptionThe Senior FPGA/Emulation Validation Engineer position is your opportunity to join one of the industrys leading companies in platform security management and ransomwaredetection for cloud datacenters, 5G infrastructure and disaggregated compute ecosystems. You should have prior knowledge about SOC architecture, and emulation and prototyping platforms. As the Senior FP

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Full-time

Depends on Experience

Post silicon Validation engineer

San Jose, California

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Today

Position: Post silicon Validation engineer Exp: 10+ years Location: Sanjose,CA Key Skills: Post Silicon Validation, Oscilloscope, Multimeters, Analyzers, PCIe, Ethernet, Python, Perl Conduct initial power-on, reset sequencing, clock bring-up, and strap configuration for complex networking ASICs or SoCs EValidate Ethernet (e.g., 100G/400G/800G) MAC/PHY and PCIe (Gen 4/5/6) interfaces for physical layer integrity. Develop, execute, and automate validation test plans and SDK-driven test environme

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Full-time, Part-time, Third Party, Contract

Post Silicon Validation Engineer

Santa Clara, California

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Today

BS Degree in EE with one or two years of experienceKnowledge of board bring up, HW troubleshooting skills and board testing as per the test planFamiliarity of working in lab environment in electrical measurements of different IO interfaces(PCIE, USB, HMDI and I2C/SPI) and using Test Equipment like Oscilloscope, DAQ, Multi-meter, Power Supply and Logic analyserAbility to read schematics and familiar with layout files (*.brd file using Cadance Allegro tool)Knowledge of Basic Linux commands and und

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Full-time

Depends on Experience

PCB Board Design & Development Engineer @ San Jose, CA (Onsite)

San Jose, California

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2d ago

Position: PCB Board Design & Development Engineer Duration: 12+ months contract Location: San Jose, CA (Onsite) JOB DESCRIPTION SKILLS NEEDED :PCIe Gen4/Gen5, DDR4/DDR5, high-speed SerDes Lead end-to-end board design and development for complex, multi-layer high-speed systems (PCIe Gen4/Gen5, DDR4/DDR5, high-speed SerDes). Define and drive system architecture, schematic design, and component selection. Oversee PCB layout execution, stack-up definition, and SI/PI compliance. Perform and sup

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Third Party, Contract

Depends on Experience

NVME Test Engineer_Sanjose, CA (Onsite)_Only Xoriant W2

San Jose, California

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14d ago

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- NVME Test Engineer LOCATION Sanjose, CA (Onsite) DURATION 12+ Months (May get extend) MODE OF INTERVIEW Zoom/Webex/Onsite RATE $75 per hour on w2 (without Benefits) JOB DESCRIPTION This position will define, implement and support

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Contract

$60 - $75

Customer Engineering - PCIe / CXL / Peripherals, Staff

Santa Clara, California

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Yesterday

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Software Applications Engineering General Summary: Join our PCIe software team as a Staff Embedded Software Customer Engineer and play a pivotal role in advancing high-performance interconnect technologies. In this role, you will: Collaborate on server-class PCIe/CXL controllers and multi-controller subsystems.Review customer requirements and implement customer-specific features in both software and hardwar

Full-time

USD 145,000.00 - 217,600.00 per year

Staff Engineer - Embedded Firmware Development - CXL / PCIe / Near-memory accelerator / Memory-Expansion Controllers

Santa Clara, California

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Yesterday

Full-time

USD 111,070.00 - 166,400.00 per year

Principal Engineer , Software/Firmware - CXL/PCIe

Santa Clara, California

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Yesterday

Full-time

USD 154,680.00 - 231,700.00 per year

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