Search Jobs | Dice.com

Santa Clara, California

•

2d ago

We are looking for formal verification experts to ensure design correctness using mathematical verification techniques and advanced formal tools. Key Responsibilities: Develop formal verification strategies and methodologies Write SystemVerilog Assertions (SVA) Perform property checking, equivalence checking, and CDC/RDC analysis Identify corner cases missed in simulation Collaborate with RTL teams for design improvements Required Skills: Strong knowledge of formal verification tools (Ja

Easy Apply

Part-time

Depends on Experience

Formal Design Verification DV Engineer

Santa Clara, California

•

Yesterday

Roles & Responsibilities: We are looking for formal verification experts to ensure design correctness using mathematical verification techniques and advanced formal tools. Key Responsibilities: Develop formal verification strategies and methodologies Write SystemVerilog Assertions (SVA) Perform property checking, equivalence checking, and CDC/RDC analysis Identify corner cases missed in simulation Collaborate with RTL teams for design improvements Required Skills: Strong knowledge of fo

Easy Apply

Contract, Third Party

Depends on Experience

Interface IP DV Engineer

Santa Clara, California

•

Yesterday

Job Description:Looking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR, Ethernet, USB, etc. Key Responsibilities: Verify interface IPs for protocol compliance and robustness Develop UVM testbenches using VIPs Execute corner-case and stress testing Analyze protocol-level failures and debug issues Work with design teams to ensure spec compliance Required Skills: Strong knowledge of standard protocols (PCIe/DDR/USB/Ethernet) Expertise

Easy Apply

Third Party, Contract

Depends on Experience

GPU DV Engineer

Santa Clara, California

•

Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm GPU Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm Engineers collaborate wi

Full-time

USD 182,200.00 - 273,400.00 per year

Staff DV Engineer

Saratoga, California

•

Today

Ready to make connectivity from space universally accessible, secure and actionable? Then you've come to the right place! E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems. We're intentional, we're una

Full-time

USD 120,000.00 - 220,000.00 per year

Principal DV Engineer

Saratoga, California

•

Today

Full-time

USD 120,000.00 - 220,000.00 per year

IP DV Engineer

Santa Clara, California

•

9d ago

IP DV Engineer Location:Santa Clara, California( onsite ) Duration: 12+ months Interview: Phone/ Skype-2Rounds End Client: L&T Visa: Any visa Linkedin Must have Job Description: Job Description & Skill Requirement: Job Description: 4 to 8 yrs We are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments. Key Responsibilities: Develop and maintain UVM-based verification environments Crea

Easy Apply

Contract, Third Party

$50 - $60

Design Verification Engineer

Remote or Hybrid in Sunnyvale, California

•

4d ago

Title DesignVerificationEngineer-Performance Modelling Location Sunnyvale CA, Austin TX or Remote Key ResponsibilitiesDevelop, maintain, and enhance STL (Scenario/Test List) generation scripts andperformancevalidation infrastructure.Monitorperformanceregression status and track keyperformanceindicators (KPIs) across IP and subsystem levelverificationenvironments.Analyze regression failures and collaborate with IP, Design, andDVowners to drive issue resolution.Debugverificationtests that fail t

Easy Apply

Full-time

150,000 - 170,000

Device Engineer III

Foster City, California

•

Today

At Gilead, we're creating a healthier world for all people. For more than 35 years, we've tackled diseases such as HIV, viral hepatitis, COVID-19 and cancer - working relentlessly to develop therapies that help improve lives and to ensure access to these therapies across the globe. We continue to fight against the world's biggest health challenges, and our mission requires collaboration, determination and a relentless drive to make a difference. Every member of Gilead's team plays a critical ro

Full-time

USD 117,895.00 - 152,570.00 per year

Design Verification Engineer

Remote

•

2d ago

Design Verification (DV) Engineer Key Responsibilities Develop and maintain UVM-based SystemVerilog testbenchesCreate reusable verification components and environmentsDevelop and execute verification plans for subsystem and block levelDebug RTL issues and collaborate closely with designContribute to end-to-end validation flowsDrive coverage closureRequired Qualifications Strong hands-on expertise in UVM and SystemVerilogExperience with ARM-based protocols including:APBAXI (no CHI/coherency requi

Easy Apply

Contract

Depends on Experience

Senior DFT Engineer

Remote

•

Today

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others - with an additional $500M in signed contracts across commercial and US government customers - we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep

Full-time

USD 170,000.00 - 250,000.00 per year

Design Verification Engineer at San Jose, CA

San Jose, California

•

Today

Position: Senior DV Engineer Location - San Jose, CA, USA FTE/FTC Role Summary The Senior Engineer DV is responsible for leading and executing end-to-end design verification activities for IP, Subsystem, or SoC-level projects. This role involves technical ownership and close collaboration with design, architecture, and customer teams to achieve verification closure with high quality. Key Responsibilities Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnec

Easy Apply

Full-time

Senior ASIC DV Engineer

San Jose, California

•

Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: Architecting block and full-chip verification e

Full-time

USD 127,100.00 - 226,000.00 per year

Filter Results

Job post features

Posted date

Work settings

Employment type

Distance

Employer type

Work authorization