Title: Pre-Silicon Validation Location: Santa Clara, California Full Time Job Description: Experience with DFT insertion for SCAN (with SSN) and MBIST Repair Implementation and Verification Generating collaterals for Test Timing and Place and Route Familiarity with the Siemens suite of DFT tools (e.g., Synopsys DFTMAX, Mentor Tessent). Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec Verification of DFT features including Boundary Scan, JTAG, SCAN, MBIST