Edwin Khalko

JOB RESPONSIBILITIES: Perform ASIC design implementation in one or more of: logic synthesis, static timing analysis (STA), and place and route (PnR). Develop and maintain implementation flows and scripts, and drive timing, power, and area (PPA) closure. Perform timing signoff, including constraint (SDC) development and checking, and resolve timing violations. Work with RTL design, DFT, and physical design teams to resolve implementation issues. Support silicon bring-up and commercialization. R