Role: High Voltage Battery & Ford Pro Upfitter Feature Assurance Engineer
Location: Dearborn, MI 5 days Onsite.
Contract Role
Job description:
Bachelor's degree in Automotive Engineering, Systems Engineering, Mechanical Engineering, Electrical Engineering, Computer Engineering, Mechatronics Engineering or related field
4 years of experience performing systems or features engineering including features, systems issue triaging, validation and sign-off processes.
2 years of experience with each of the following skills is required:
o Investigating and resolving feature or system issues during product development and launch or analyzing system or feature failure points and evaluating solution proposals including conducting high level FMAs and FMEAs.
o Utilizing automotive communication protocols including CAN, CAN FD and Ethernet.
o Defining systems/feature test requirements and test cases.
o Collaborating with cross-functional teams
Experience using Vector CANalyzer, VN1630A or GL3400
Experience using Ford internal tools/services: DET, ULT, VADR, FDRS, IVS, Mobile apps (i.e. FordPass)
Desire experience on Bluetooth communication, WiFi communication, Vehicle Infotainment, Ford Pro ViS, TestRail, VSEM, VSCS, JIRA, Jama, MS Suite, Qliksense
Responsibilities:
Manage and deliver Features Assurance Engineering deliverables for High Voltage Battery and Upfitter Features (i.e. Upfitter Interface, Power Take-Off , Remote Engine Control, Onboard Scales, On Demand Conditioning) including:
Develop feature validation plan including functional, performance, Functional Safety V&V, Cybersecurity and regulatory requirements as applicable. Including the selection of test cases, testing environment (i.e. Breadboard, HiL, vehicle), confirming testing facility/resources (i.e. tester, HiL, vehicle, etc.) and completion timing in alignment with program milestones expectation (i.e. 1st full pass prior to PEC, etc.)
Coordinate Feature Validation Plan execution and support
Assess test results to ensure compliance with test/requirements passing criteria.
Maintain a real-time, comprehensive open issue list within Jira, ensuring accurate categorization, detailed descriptions, and clear assignment. Regularly review, track, and provide detailed progress reports on all open issues to relevant stakeholders (e.g., weekly status meetings, bi-weekly program reviews). All test results and supporting engineering artifacts (e.g., CAN logs, Bus Queries, diagnostic traces, video recordings) must be consistently uploaded and linked within Jira for full traceability and analysis
Lead FDJ milestone feature signoff process in partnership with counterpart FSE.
Provide tester teams with test cases, software and hardware pedigrees and any additional information needed to complete validation.
Develop negative test cases and Feature Assurance Test Procedures including stress testing to address multi-interface conflicts, edge case, and unexpected I/O conditions.
Review and complete feature VSCS (Vehicle Specific Configuration Specification) signoffs as applicable by milestone.
Lead triaging and issues resolution during the entire feature development cycle.
Level of Changes alignment and Signoff with Feature System Engineer (FSE) counterpart.
Identify, assess (P-rating and Criticality Prioritization Number), document (i.e. JIRA defect ticket) and develop/lead resolution plan for test results defects in alignment with New Model Launch timing guidelines.
Determine Software and Hardware pedigree required to complete validation.
Lead Voice of the Customer / AIM feature issues resolution in alignment with New Model Launch timing guidelines.
Create, access and maintain JIRA tickets throughout the entire feature lifecycle (development and production) assigned to Feature Assurance Engineering.
Lead the feature validation report creation, ensuring that it meets the highest standard of signoff criteria.
Review test results and report with corresponding FAE supervisor to complete signoffs.
Develop and lead DRP (Deliverable Recovery Plan) approval as needed (i.e. P0/P1 defects at FEC milestone) for non-conformance signoffs.
Identify opportunities to enhance the robustness of feature signoff validation testing and process.
Lead the triaging and resolution of feature quality issues in the field.
Proactively communicating task progress and status to designated leaders through specified channels (e.g., JIRA), creating and maintaining Jira Dashboards as applicable.
Clearly, concisely, and effectively communicate complex technical systems, identified issues, and proposed resolutions to diverse audiences, including engineering teams, program management, and leadership. This includes preparing and delivering technical presentations, written reports, and contributing to decision-making processes.
Deliverables:
+90% JIRA deliverables executed on time
100% JIRA tickets with clear issue explanation for Blocked, Escalation and Delayed status
100% validation plan signed off by FDJ
100% gating deliverables, for all milestones, executed on time (assuming the program was loaded on time)
100% First Pass testing completed by PEC (Program content New, Modified and Reapplication)
100% sign-off completed, FEDE assessed (including DRP and FEC Exception) and Chief Deep Dive signed-off by FEC
100% P0/P1 issues with Root Cause and Fix Point Date confirmed by the milestone (PEC, FEC, TT, PP, MP1)
100% of Mini-DVs completed and Chief Declaration Letter signoff at FDJ, FEC and MP1 milestones.
Ensure all PAC papers achieve Closed status within 96 days from initiation, with FSA type PACs reaching Pending within 60 days.
Zero Recalls and Stop Ship/Stop Build caused by features' delivery or lack of feature detection.
90 days to develop an action plan for issues/calls identified on JD Power IQS Survey and Top 10 NPS and Top 10 Warranty Issues
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