Staff Engineer

Job Title: ASIC/RTL Design Engineer 2 Location: San Jose, CA Type: 12+ Months Contract Job Duties: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IP?s. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC?s in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including Chip Definition, Architecture develop

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and complian

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- Sr. Staff Engineer (SystemVerilog & Digital Verification)LOCATION:- SanJose, CA (onsite)This role is part of a large RFC/RFIC/DFT engineering organization, focused on advanced digital verification across complex SoC and mixed-sig

Title: ASIC RTL Design Engineer - Onsite Mandatory skills: SoC Architecture, ASIC design flow, RTL coding, debugging, verification, supporting synthesis, timing closure, ARM cores, I/O standard interfaces, Ethernet, DDR, DMA, PCIE, SATA, internal IPs, digital CMOS processes, SoC design, Chip definition, Architecture development, modeling, micro-architectural specifications, micro-architectural specifications, logic implementation, emulation, debug Description: JOB DUTIES: The work will expose th