Senior Verification Analyst

RequirementsKnowledge of semiconductor ASIC design/verification methodologies and flows Working knowledge of Verilog/SystemVerilog/UVM Strong programming skills including object-oriented programming Working experience with digital logic design and verification Practical experience in D2D, NOC, AXI, Ethernet, DDR/LPDDR, HBM, Security, Networking, ARM CPU subsystems Demonstrates good analysis, problem-solving, and critical thinking skills Effective interpersonal, teamwork, and communication skills

Minimum 10+ years of experience in Digital Design Verification (DV) Proficiency in SystemVerilog for verification environments Hands-on experience in digital verification methodologies and testbench development Familiarity with mixed-signal designs, preferably involving ADC-based chips Experience working in Unix/Linux environments Hands-on experience with Cadence Xcelium simulation tool Comfortable working with both Linux/Unix and Windows-based environments

Job Title: Integration Validation Lead Location: Remote/WFH Duration: 9 months+ contract CSV / Validation Lead, with MES experience considered a strong plus. The ideal candidate will have 510 years of relevant experience. Computer Systems Validation (CSV) Lead Key Responsibilities: The selected candidate will support client engagement teams in delivering projects within the Life Sciences domain, including: Leading computer systems validation activities to ensure GxP regulated

Systems Analyst Role Overview We are seeking a Systems Analyst to support large-scale healthcare analytics and interoperability initiatives, with a strong focus on quality reporting and standards-based data exchange. This role is highly technical and hands-on, working primarily in backend data environments involving complex healthcare data, HL7 standards, and analytics platforms. The ideal candidate is comfortable operating at the intersection of business requirements, data architecture, and te