Job Role: Design Verification Lead
Work location: Sunnyvale, CA
Onsite
Role: Lead SoC/Sub-System Design Verification
About the Role
We are seeking an experienced Design Verification Lead to drive SoC-level verification strategy, lead high performing teams, and ensure first time right silicon. This role requires deep technical expertise, strong leadership, and the ability to influence cross functional teams while working in a fast paced environment.
Your Profile / Required Qualifications
12+ years of experience in SoC design and verification.
Strong expertise in UVM, UPF, and protocol VIPs.
Proven ability to define and execute verification strategies at SoC and subsystem levels.
Hands on experience with AMBA protocols (AXI, AHB, APB) and at least one high speed or memory protocol.
Proficient in SystemVerilog, VHDL, Python, and TCL scripting.
Deep understanding of functional coverage, constrained random verification, simulation, emulation, and formal methods.
Experience participating in or driving architecture reviews and reacting to design/architecture changes.
Strong debugging skills with the ability to work independently in fast-paced environments.
Demonstrated ability to lead teams, influence stakeholders, and deliver strategic technical solutions.
Master s degree in electrical engineering, Computer Science, or a related field.
Nice to Have
Experience with performance verification.
Hands on exposure to formal verification methodologies.
Never miss an opportunity! Create an alert based on the job you applied for.
