Digital Verification Engineer

Job Description

Title: Digital Verification Engineer
Location: Atlanta, Georgia

Duration: 12 Month

Position Details
Must Haves:

• Strong experience with UVM based verification, including testbench development and debug.
• Hands on experience with high speed serial VIPs (e.g., DisplayPort, HDMI, USB).
• Demonstrated experience working with ASIC design, verification, or implementation processes to ensure successful development and delivery of application specific integrated circuits.
• Solid understanding of SoC level verification flows.
• Proficiency in writing constrained random and directed tests.
• Demonstrated ability in debugging failures, analyzing coverage, and closing verification gaps.
• Experience with assertion based verification, scoreboards/checkers, and verification methodologies.

Plusses:

• 10+ years of digital verification experience (not required).
• Experience supporting full chip verification, including Gate Level Simulation (GLS).
• Background working with complex interface IPs or multi IP SoC environments.
• Familiarity with CI based verification flows and regression automation.

Day to Day Responsibilities:

• Support the DV team in verifying DisplayPort, HDMI, USB, and other interface IP blocks.
• Collaborate with design and architecture teams to build and refine verification plans, test strategies, and coverage goals.
• Write, execute, and debug constrained random and directed testcases.
• Analyze coverage reports, identify gaps, and drive coverage closure.
• Implement and maintain assertions, scoreboards, and checkers for end to end data integrity.
• Participate in code reviews, regression triage, and continuous integration workflows.
• Contribute to block level and full chip verification closure, including gate level simulations.

Seeking a highly skilled ASIC Verification Engineer with strong experience in UVM based testbench development, debug, and functional verification. This engineer will contribute to first time right silicon for complex connectivity and interface IPs. Ideal candidates have 10+ years of experience. The role focuses on verifying high speed interface IPs such as DisplayPort, HDMI, and USB, enhancing verification infrastructure, building coverage plans, and partnering with design and architecture teams to ensure robust SoC level verification.

Featured benefits

Dental insurance, 401(k), Medical insurance, Vision insurance