Mixed Signal Verification Engineer

Duration: 12+ months contract Location: San Jose, CA (Onsite, 5 days/week) Description: PCB Development: Lead the schematic entry, component selection, and layout routing optimization for complex RF evaluation boards using Cadence Allegro.Simulation & Analysis: Perform Signal Integrity (SI) and Power Integrity (PI) simulations. Utilize Ansys HFSS for EM modeling and impedance matching to ensure optimal RF performance.Hardware Bring-up: Own the board bring-up process, including debugging hardware

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- Sr. Staff Engineer (SystemVerilog & Digital Verification)LOCATION:- SanJose, CA (onsite)This role is part of a large RFC/RFIC/DFT engineering organization, focused on advanced digital verification across complex SoC and mixed-sig

Job Title: Senior Staff Verification Consultant Location: Austin, TX (Onsite, 5 days/week) Duration: Long Term Only W2 //NO CORP TO CORP// Description As a Senior Staff System IP Design Verification Contractor you will contribute to the functional verification of System IP including coherent interconnect and caches. This is a technical individual contributor role with heavily involved hands-on project execution. A strong background in Design Verification and hands-on experience with both block

Job Description: Job Title: "Senior Layout Design Engineer" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description Client is looking for a talent that has strong background and hands-on experience on RF/Analog circuit layout design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for wireless communication systems along with circuit designers. Requirements Associate and Bachelor's Degree with 10+ years of relevant industry exper