Sr. Principal AI System Architect

Milpitas, CA, US • Posted 8 hours ago • Updated 4 hours ago
Full Time
On-site
DOE
Fitment

Dice Job Match Score™

🔢 Crunching numbers...

Job Details

Skills

  • Management
  • Scalability
  • Machine Learning (ML)
  • Collaboration
  • Computer Hardware
  • Caching
  • IP
  • Intellectual Property
  • Articulate
  • Electrical Engineering
  • Systems Architecture
  • System On A Chip
  • DRAM
  • DDR SDRAM
  • NAND
  • Artificial Intelligence
  • GPU
  • C
  • C++
  • Python
  • RTL
  • Modeling
  • PCI Express
  • Ethernet
  • Remote Direct Memory Access
  • IT Management
  • Technical Writing
  • Mentorship
  • Coaching
  • Communication
  • Workload Analysis

Summary

Key Responsibilities
Lead the definition of system-level solutions with emphasis on compute memory bottlenecks, bandwidth and latency management
Analyze workload requirements and map them to hardware technologies and architecture while optimizing performance, power efficiency, and scalability
Develop system-level architecture that is co-optimized with software
Develop system-level performance and power models with the ability to assist in making customer-specific trade-offs
Map AI/ML models to hardware requirements
Collaborate with software and hardware teams to ensure seamless integration of memory subsystems, cache hierarchies, and system interconnects
Explore novel technologies and architectures such as in-memory and near-memory computing, and innovative packaging solutions
Guide design teams, produce technical documentation, and IP designs
Clearly articulate and drive key concepts to a broad technical audience

Required Qualifications
10+ years of experience
Master's Degree in Electrical Engineering
Master's Degree in Computer Engineering
Master's Degree in Computer Science
Ph.D. in Electrical Engineering
Ph.D. in Computer Engineering
Ph.D. in Computer Science

Skills
System Architecture
SoC Design
Memory System Development
Memory Technologies (DRAM, DDR, LPDDR, GDDR, NAND)
AI Accelerators and GPU Architecture
C/C++ Programming
Python
RTL Design
System-Level Modeling
Interconnect Technologies (PCIe, CXL, NoCs, Ethernet, RDMA)
Chiplet Design
In-Memory and Near-Memory Computing
Technical Leadership
Technical Documentation
Mentoring and Coaching
Stakeholder Communication
Workload Analysis

Schedule
Start date: 2027-01-04
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: compun
  • Position Id: GANDC5868393
  • Posted 8 hours ago
Create job alert
Never miss an opportunity! Create an alert based on the job you applied for.