Senior Layout Design Engineer

Job Description:

Job Title: "Senior Layout Design Engineer"

Location: San Jose, CA (Onsite, 5 days a week)

Duration: Long Term

Description

Client is looking for a talent that has strong background and hands-on experience on RF/Analog circuit layout design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for wireless communication systems along with circuit designers.

Requirements

• Associate and Bachelor's Degree with 10+ years of relevant industry experience in Electrical Engineering, Technical, or related field preferred.
• Extensive experience in analog/mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes including FinFET technologies.
• High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports.
• Extensive experience in analog/RF related circuit layout, including LNA/PA/PLLs and etc.
• High level of proficiency in CADENCE or MENTOR GRAPHICS layout tools.
• Good communication skills with design leads as well as engineers for schedule planning.
• Being able to lead a small group of layout engineers to deliver a successful tapeout.
• Programming knowledge in SKILL, Perl, and/or Python is a bonus.
• You re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.