PCB Layout Engineer

PCB Layout Engineer (High-Speed Server Board Design)Location: Bay Area, CA (Onsite) Duration: 6+ Months (Contract) Job SummaryWe are seeking an experienced PCB Layout Engineer with strong expertise in high-speed PCB layout and server board design. The ideal candidate will have hands-on experience designing complex multilayer server boards and be highly proficient in Cadence Allegro PCB Designer version 22.1 or higher. This role requires close collaboration with hardware, signal integrity, power

Analog Layout Engineer Bay Area, CA Long term Contract Exp : Minimum 8 years and above Skill : 2nm, 3nm and 5nm process and high speed layout Blocks : LDO ,ADC and SERDES Tools : Cadence ,Virtuoso XL

Job SummaryMeta is seeking an experienced PCB Layout Engineer with advanced expertise in Cadence Allegro PCB and complex, high-density PCB layout. The ideal candidate will have strong experience designing high-speed server and hardware boards involving advanced memory interfaces, PCIe, high-speed digital, analog, mixed-signal, and power domains. Cadence Allegro Layout 23.1 or higher is mandatory. Key ResponsibilitiesOwn end-to-end PCB layout for complex, high-density designs used in data center

Senior High-Speed Mixed-Signal / Analog IC Layout Engineer (San Jose, CA)As an Analog Layout Engineer, you will be responsible for: Layout of Analog / High Speed transceiver circuit blocks such as amplifiers, drivers, ADC, DAC, LDO, PLL, filters, etc. in a timely manner. Layout of sensitive active / passive components including resistors, capacitors and inductors. Design verification including DRC, LVS, ERC and ANT and extraction. Block level floor planning with design engineers. Review and upda