ASIC Jobs in California

1 - 20 of 2,723 Jobs

Sr Director, ASIC EngineeringJob Title - Sr Director, ASIC Engineering

PaloAlto NetworksCompany Name - PaloAlto Networks

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Santa Clara, California, USA

Full-time

Company Description Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure than the one before. We are a company built on the foundation of challenging and disrupting the way things are done, and we're looking for innovators who are as committed to shaping the future of cybersecurity as we are. Who We Are We take our mission of

Sr. Package Design Engineer ASIC/SOCJob Title - Sr. Package Design Engineer ASIC/SOC

DivTek Global Solutions Inc.Company Name - DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title Sr. Package Design Engineer ASIC/SOC Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available The Role: Sr. Package Design Engineer We are seeking a highly experienced Package Design Engineer with 7+ years of hands-on

Senior Front-End ASIC EngineerJob Title - Senior Front-End ASIC Engineer

DivTek Global Solutions Inc.Company Name - DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Senior Front-End ASIC Engineer Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Job Description Our client is seeking a Senior Front-End ASIC Engineer to join their elite engineering team. This is a unique op

Physical Design Engineer Custom ASIC / SoCJob Title - Physical Design Engineer Custom ASIC / SoC

DivTek Global Solutions Inc.Company Name - DivTek Global Solutions Inc.

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San Jose, California, USA

Full-time

Job Title: Physical Design Engineer Custom ASIC / SoC Hybrid San Jose, CA Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available Position Overview Physical Design Engineer: We are seeking a hands-on Physical Design Engineer w

ASIC Engineer, Design VerificationJob Title - ASIC Engineer, Design Verification

Meta Platforms, Inc. (f/k/a Facebook, Inc.)Company Name - Meta Platforms, Inc. (f/k/a Facebook, Inc.)

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Sunnyvale, California, USA

Full-time

Meta Platforms, Inc. (f/k/a Facebook, Inc.) has the following positions in Sunnyvale, CA ASIC Engineer, Design Verification: Define and implement block/IP/SoC verification plans, build verification test benches to enable block/IP/sub-system/SoC level verification. (ref. code REQ-2503-148189: $178,763/year to $192,170/year). Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include

FPGA/ASIC Verification Engineer (Silicon Engineering)Job Title - FPGA/ASIC Verification Engineer (Silicon Engineering)

SpaceXCompany Name - SpaceX

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Sunnyvale, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is th

Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)Job Title - Lead ASIC & FPGA Design Engineer - Vitis HLS (HYBRID TELEWORK)

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or King of Prussia, Pennsylvania, USA

Full-time

Job Description We are committed to work-life balance by promoting this hybrid telework opportunity. These job requirements allow the employee to work at a Lockheed Martin-designated office or job site for part of their schedule and has a predefined regular, recurring telework schedule for the remaining part of their work schedule. Who We Are Lockheed Martin is dedicated to shaping, developing, & advancing technologies & capabilities with a focus on our customers' needs as part of our 21st Ce

FPGA/ASIC Design Engineer (Silicon Engineering)Job Title - FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceXCompany Name - SpaceX

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Irvine, California, USA

Full-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the worl

Senior Software Engineer, ASIC Verification ToolsJob Title - Senior Software Engineer, ASIC Verification Tools

NVIDIACompany Name - NVIDIA

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Santa Clara, California, USA

Full-time

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Senior Software Engineer, ASIC Verification ToolsJob Title - Senior Software Engineer, ASIC Verification Tools

NVIDIACompany Name - NVIDIA

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Santa Clara, California, USA

Full-time

Senior ASIC Synthesis EngineerJob Title - Senior ASIC Synthesis Engineer

NVIDIACompany Name - NVIDIA

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Santa Clara, California, USA

Full-time

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! Work as part of the advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working

Senior ASIC Synthesis EngineerJob Title - Senior ASIC Synthesis Engineer

NVIDIACompany Name - NVIDIA

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Santa Clara, California, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Huntington Beach, California, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Huntington Beach or El Segundo, CA. From complex digitally beamformed phased arrays for constellation satellite prog

ASIC/FPGA Lead Verification Engineer IIIJob Title - ASIC/FPGA Lead Verification Engineer III

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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San Diego, California, USA

Full-time

Job Description Join Our Team as an ASIC & FPGA Lead Verification Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. Location: Although this position does support some teleworking; the selected candidate will need to be located near our Lockheed Mar

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

CloudiousCompany Name - Cloudious

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San Jose, California, USA

Contract

Job Description: Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA components. Establish prototyping systems in the lab and contribute to defining, evolving, and supporting our prototyping methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design, and Verification teams to validate the functional and performance objectives of the SoC. What

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTVJob Title - ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV

Boeing CompanyCompany Name - Boeing Company

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Mountain View, California, USA

Full-time

ASIC FPGA Design and Verification Engineer - (Experienced, Lead, or Senior) - MTV Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Experienced, Lead, or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Mountain View, CA. From complex digitally beamformed phased arrays for constellation satellite programs to c

Senior ASIC Engineer, Static Timing AnalysisJob Title - Senior ASIC Engineer, Static Timing Analysis

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Santa Clara, California, USA

Third Party, Contract

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: San Jose, CA Onsite Alternate location: Colorado office - Longmont Remote is an option for right fit Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA

Staff ASIC & FPGA Design Engineer (HYBRID TELEWORK)Job Title - Staff ASIC & FPGA Design Engineer (HYBRID TELEWORK)

Lockheed Martin CorporationCompany Name - Lockheed Martin Corporation

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Remote or King of Prussia, Pennsylvania, USA

Full-time

Sr. DSP R&D Engineer - C/C++, Wireline, Simulink, ASICJob Title - Sr. DSP R&D Engineer - C/C++, Wireline, Simulink, ASIC

Motion Recruitment Partners, LLCCompany Name - Motion Recruitment Partners, LLC

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Irvine, California, USA

Full-time

Our client is a glbal infrastructure technology leader built on more than 60 years of innovation within the semiconndutor and Manufacturing space for communications. They are urgently seeking a Sr. level Digital Signal Processing (DSP) R&D Engineer to join their growing team. Responsibilities include: Develop specification, architecture, and micro-architecture of digital signal processing and communications algorithms Bit-exact MATLAB/Simulink and C/C++ system modeling and simulation Develop and

Senior Asic EngineerJob Title - Senior Asic Engineer

Aditi ConsultingCompany Name - Aditi Consulting

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California, USA

Full-time

Salary: $280k - $300k/Yr. Responsibilities: Define and architect packet processing pipelines including related lookup tables and metadata structures for high-performance networking ASICs, including ingress/egress processing, switching/bridging and routing, hash tables and memory lookups, classification, ACL, various tunneling protocols like VxLAN, GRE, IPinIP, QoS, scheduling, traffic management, and congestion control. Work closely with the CTO to translate high-level system requirements and c