1 - 20 of 234 Jobs

Sr. Principal EDA Software Engineer (C++, Characterization)

Cadence Design Systems Inc

San Jose, California, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets. Must haves: 8+ years of experience i

Electronic Design Automation (EDA) Engineer - Advanced Packaging - AI/ML

Marvell Semiconductor Inc.

Burlington, Vermont, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

EDA/CAD SW Engineer

Qualcomm Technologies

San Diego, California, USA

Full-time

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This

Sr Software Engineer (C++, Numerical Analysis, EDA)

Cadence Design Systems Inc

San Jose, California, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a talented software engineer to help design and develop some of the most complex Electronic Design Automation (EDA) software in the electronics world. Our software is used to design everything from hearing aids to complex, high end compute servers to your favorite tablet. Responsibilities: Design and develop advanced automated design flows for 3D-IC, IC Packaging and

Sr Software Engineer (C++, Numerical Analysis, EDA)

Cadence Design Systems Inc

Boston, Massachusetts, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a talented software engineer to help design and develop some of the most complex Electronic Design Automation (EDA) software in the electronics world. Our software is used to design everything from hearing aids to complex, high end compute servers to your favorite tablet. Responsibilities: Design and develop advanced automated design flows for 3D-IC, IC Packaging and

EDA RnD Software Engineer

Cadence Design Systems Inc

Austin, Texas, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a talented engineer for our circuit simulation suite Spectre FX (Fastspice) Product line. You will work on several possible R&D projects (Fastspice event-driven algorithms, matrix solver, parallel computing, memory/cpu optimization) and be responsible for advancing and creating state-of-the-art circuit simulation technologies and solutions. Must have numerical analysi

Salesforce Education Cloud Consultant,

Prutech Solutions

Remote or New York, New York, USA

Full-time

About Us: Founded in 1997, PruTech is dedicated to problem-solving, creating solutions, and maintaining strong partnerships with its clients. PruTech serves a diverse list of clients in different industries from government to finance, retail, and manufacturing. PruTech has offices in New York City, Washington DC, North Carolina, and two nearshore offices in Mexico City and India. With over 20 years of Information Technology and system integration experience, PruTech provides multiple ways to ass

Software FPGA Infrastructure Engineer

Axiom Global Technologies, Inc.

Redmond, Washington, USA

Third Party, Contract

Job Title: Software Infrastructure EngineerLocation: Redmond, WADuration: 12+ Months Job Overview:We are seeking a talented Software Infrastructure Engineer to join the End-to-End (E2E) System and Infrastructure team at RL Silicon. In this role, you ll focus on designing, building, and maintaining robust software infrastructure for firmware/software development, system integration, and validation across both pre-silicon and post-silicon environments. Key Responsibilities: Develop scalable autom

Decision Science Analyst

VDart, Inc.

San Antonio, Texas, USA

Contract, Third Party

Title: Decision Science Analyst Location: San Antonio TX (Onsite) Duration: Long Term Job Description: Apply statistical and mathematical techniques and provide decision support for businessGather, manipulate and perform exploratory Data Analysis (EDA) to draw actionable insights and inferences and make recommendationsLeverage business/ analytical knowledge to participate in discussions with cross functional teamsDocument assumptions, methodology, validation, and testing of various analysis perf

RF Layout Engineer

Flexon Technologies Inc.

Cupertino, California, USA

Contract

Job Description: In this role, you will focus on the physical implementation and optimization of integrated circuits (ICs). Responsible for creating and refining the physical layout of circuits, ensuring manufacturability, performance, and cost-effectiveness. Responsibilities: Physical Layout Design: Designing and implementing the physical layout of ICs, including placement, routing, and signal integrity analysis. Design Optimization: Optimizing the physical design for performance, power consump

Sr Principle Software Engineer

Cadence Design Systems Inc

Burlington, Massachusetts, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Description We are looking for a remarkably talented Software Engineer to join the Palladium Software Development team. You will work closely with a small team of exceptional engineers that are heavyweights in Cadence and EDA while developing the next generation Palladium emulation platform. The team brings a unique focus to quality and innovation while designing state-of-the-a

Sr. Package Design Engineer ASIC/SOC

DivTek Global Solutions Inc.

San Jose, California, USA

Full-time

Job Title Sr. Package Design Engineer ASIC/SOC Job Location: San Jose, CA (Hybrid) Benefits: Excellent PTO, full benefits, 401(k), hybrid schedule, great team culture Job Type: Full-Time, Permanent About Company: This is a full-time role, directly employed position through the client. Work Schedule Type: This is a hybrid position Relocation: Relocation assistance available The Role: Sr. Package Design Engineer We are seeking a highly experienced Package Design Engineer with 7+ years of hands-on

DFT Engineer || Dallas ,TX(Onsite)

Zodiac Solutions Inc.

Texas, USA

Part-time, Third Party, Contract

Position : DFT Engineer Location: Dallas ,TX(Onsite) Job Description: Responsible for developing, maintaining and supporting flows across all company business units and projects Architecting methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, ASICs and SoC designs. Writing and automating RTL for advanced DFT and DFD features not currently supported by the EDA vendors Developing automated verification test bench and sequence creation for DFT IP

Senior ASIC Engineer, Static Timing Analysis

Infobahn Softworld Inc.

Santa Clara, California, USA

Contract, Third Party

Role Title: Senior ASIC Engineer, Static Timing Analysis Location: San Jose, CA Onsite Alternate location: Colorado office - Longmont Remote is an option for right fit Duration: 12+ months contract Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA

Senior SOC/ASIC Verification Engineer

GAC Solutions Inc.

Phoenix, Arizona, USA

Full-time, Part-time, Contract, Third Party

Role: Senior SOC/ASIC Verification Engineer Location: Arizona - Onsite Contract We're seeking an experienced Design Verification Engineer with 8 10 years of hands-on expertise in SystemVerilog/UVM, EDA tools (Synopsys/Cadence), and scripting (Python, TCL, Perl). Must have experience in functional verification, assertions, and emulation, with a strong track record in ASIC development. Background in verifying GPU/CPU, high-speed interfaces (PCIe, DDR), or data center applications is a plus.

ASIC Implementation Engineer

Broadcom Corporation

San Jose, California, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description: ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and

Senior ASIC Engineer, Static Timing Analysis (STA), PT/DC checks @ San Jose, CA/Longmont, CO

Infobahn Softworld Inc.

Richardson, Texas, USA

Contract

We have an immediate opportunity with one of our direct clients. Please find the job description below and if you are interested, please forward your resume and share below details: Best contact number: Work Authorization: Hourly Payrate expected: Month & Day of birth (MM/DD): Present Location & Zip-code: LinkedIn: Title: Senior ASIC Engineer, Static Timing Analysis (STA) Location: San Jose, CA- Onsite. Alternate location: Colorado office - 3100 Logic Dr, Longmont Duration: 12+ months R

CPU Physical Design Pathfinding Engineer

Vaco by Highspring

San Diego, California, USA

Full-time

OverviewLead cross-functional efforts to develop next-gen CPU technologies that meet aggressive Power, Performance, and Area (PPA) goals. Collaborate with Architecture, RTL, Physical Design, Circuits, CAD, and Post-Silicon teams to drive innovation and optimization. Key Responsibilities Solve critical CPU implementation challenges across design and CAD teams. Develop and apply advanced physical design and optimization techniques. Align CPU design strategies with real-world use cases and system r

CAD Engineer - Timing for Gate-Level Flows & Methodologies

Apple, Inc.

No location provided

Full-time

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the techn

ASIC Engineer

AdientOne LLC

California, USA

Contract

Role: ASIC Engineer Location: Clara CA 95054 OR Longmont CO 80503 Duration: 12+months Job Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scrip