1 - 17 of 17 Jobs

RFIC Layout Engineer

Apple, Inc.

No location provided

Full-time

Do you have a passion for invention and self-challenge? Do you thrive with pushing the limits of what's considered feasible? As part of an outstanding `team, you'll craft sophisticated, groundbreaking projects that deliver more performance in our products than ever before. You'll work across fields to transform improved hardware elements into a single, coordinated design. Join us, and you'll help us innovate new technologies that continually outperform the previous iterations! By collaborating w

CAD Engineer

NVIDIA Corporation

Santa Clara, California, USA

Full-time

NVIDIA is searching for a motivated CAD Engineer to join the Advanced Technology Group. You will support installation of foundry techfiles. You will provide expert support to designers in debugging tool, techfile and design errors. And you will develop flows and scripts to improve productivity of custom circuit designers worldwide! A successful candidate will have solid EE or CS background with an understanding of circuits, layouts and VLSI design. We are looking for someone who enjoys writing c

CAD Extraction Engineer

Apple, Inc.

No location provided

Full-time

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance of every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the techn

Layout Engineer

Apple, Inc.

No location provided

Full-time

Apple Silicon Engineering Group is seeking Analog Layout Engineers to work on the next generation of Apple's systems-on-chip (SOCs)! These SOCs, with multi-billion transistors, serve as the core of iPhones and iPads. We focus on Analog/Mixed-Signal (AMS) circuits, including SerDes for data communication, PLLs for clock generation, and sensors for measuring all sorts of physical quantities. Analog Layout Engineers are essential in transforming design ideas into silicon, collaborating with circuit

Physical Verification Engineer, Dojo

Tesla Motors

Palo Alto, California, USA

Full-time

Tesla's Dojo Hardware team is looking for a Physical Verification engineer to work in Palo Alto, CA. Candidate will be responsible for SoC and Block level physical verification and sign-off. Responsibilities Implement physical verification flows (DRC/LVS/ERC/ANT/DFM/PERC) in advanced technology nodesDrive SoC level physical verification closure/sign offWork closely with physical design team on RDL/Bump routing and block level physical verification closure/sign off Requirements 3-5 years of exp

Analog Layout Engineer

Apple, Inc.

No location provided

Full-time

Apple Silicon Engineering Group (SEG) is seeking experienced Analog Layout Engineers to work on the next generation of Apple's systems-on-chip (SOCs)! These SOCs, with multi-billion transistors, serve as the core of iPhones and iPads. We focus on Analog/Mixed-Signal (AMS) circuits, including SerDes for data communication, PLLs for clock generation, and sensors for measuring all sorts of physical quantities. Analog Layout Engineers are essential in transforming design ideas into silicon, collabor

Senior Memory Layout Engineer

ARM

Austin, Texas, USA

Full-time

Job DescriptionHow would you like to join Arm at a time of transformation in our industry? Our Solutions Engineering Physical IP team comprises some of the industry s leading experts in deep submicron circuit/memory design and layout!. This position is a rare opportunity for you as a memory Layout professional to work with our successful layout and circuit team. You will gain experience with a wide variety of groundbreaking foundries while collaborating with our team on many different types of m

Sr Solutions Engineer (Analog Mixed Signal Layout)

Cadence Design Systems Inc

San Jose, California, USA

Full-time

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for an experienced engineer to drive the latest innovations in Virtuoso Solution team to improve analog design productivity. Requirements: The ideal candidate should have hands on experience with analog mixed signal layout development in FinFet nodes , basic circuit knowledge is a plus. Should be hands-on and be comfortable with running design automation and verification

Staff Engineer, Analog Layout

Marvell Semiconductor Inc.

Santa Clara, California, USA

Full-time

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and be

ASIC Engineer, Senior Staff, Physical Design Verification

Juniper Networks

Sunnyvale, California, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Job Description for an ASIC Physi

Memory System Designer and Place and Route Engineer

Broadcom Corporation

Mendota Heights, Minnesota, USA

Full-time

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: We are looking for an energetic and passionate design engineer to join our Central Engineering Group and be part of a memory subsystem design team responsible for the development of large memory blocks and subsystems. Typically requires a minimum of 8

Senior PDK Software Engineer

Analog Devices, Inc.

Wilmington, Massachusetts, USA

Full-time

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI

Principal HBM CAD Engineer

Micron Technology, Inc.

Richardson, Texas, USA

Full-time

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is THE place for someone to expand their career by working on key projects and developing themself into the leaders of tomorrow! We provide online learning opportunities and on-the-job train

Infra Silicon Physical Design Engineer

Cloudious

Sunnyvale, California, USA

Contract, Third Party

Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin, TX Duration: 12 Months Qualification/Experience/Skills Required: - Hands-on tape-out experience performing timing and physical verification closure on 5nm FinFET TSMC process or similar/lower technology nodes - Hands-on experience with block level physical design (Floor planning to GDSII) - Experience with SoC level integration (multiple blocks, SoC floorplan, clocking, and timing analysis) preferred - Expertise in

Lead RFIC ASIC Design Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Title: Lead RFIC ASIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $160,000 to $225,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals with a vision for the future, a desire to impact the world, and a drive to bring innovative ideas to life. They are building develop

Senior Analog RFIC Design Engineer

Everest Consultants, Inc

Hillsboro, Oregon, USA

Full-time

Title: Senior Analog RFIC Design Engineer Duration: Permanent, Full-time Location: Hillsboro, OR (Hybrid: onsite 3 days per week) Salary Range: $140,000 to $200,000 per year **Candidates must have valid U.S. work authorization at the time of hire. Our client, a leader in the test-and-measurement and wireless communications industries, is seeking passionate individuals who have a vision for the future, a desire to impact the world, and a drive to turn innovative ideas into reality. They are hirin

Silicon Physical Design Engineer II

BCforward

California, USA

Contract

Silicon Physical Design Engineer II BCforward is currently seeking a highly motivated Silicon Physical Design Engineer II for a Remote opportunity . Position Title: Silicon Physical Design Engineer II Location: Remote Anticipated Start Date: 05/12/2025 Please note this is the target date and is subject to change. BCforward will send official notice ahead of a confirmed start date. Expected Duration: 06+ Months Job Type: Contract - [FULL TIME (40 Hours a week)] Pay Range: $70.00/hr-$75/hr Ple