LVS jobs in Remote

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. EDA ENGINEER (RFIC ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest sate

Full-time

USD 125,000.00 - 150,000.00 per year

EDA Engineer (RFIC Engineering)

Redmond, Washington

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Today

Full-time

USD 125,000.00 - 150,000.00 per year

Sr. PDK Engineer (Starlink/Akoustis)

Bastrop, Texas

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. PDK ENGINEER (STARLINK/AKOUSTIS) Akoustis is now operating as a wholly owned subsidiary of SpaceX providing industry leading RF filters using patented XBAW technology to help drive the mission of making human life

Full-time

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

Irvine, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system.

Full-time

USD 165,000.00 - 260,000.00 per year

RET/OPC Process Development Engineer

Dallas, Texas

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Today

Job Description About Us: Texas Instruments is a leading innovator in advanced analog/mixed-signal devices. We are committed to pushing the boundaries of technology and delivering cutting-edge solutions to our global customers. Join our dynamic team and contribute to the next generation of 28nm/22nm node Job Description: We are seeking a highly skilled and motivated Design Retargeting Engineer to join our RET(Resolution Enhancement Team) in ATD. In this role, you will be responsible for tran

Full-time

DFM RET Engineer

Dallas, Texas

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Today

Job Description Change the world. Love your job. Texas Instruments is in an exciting era of growth and innovation, and our Advanced Technology Development (ATD) organization is at the center of it. We are developing the 28nm process technologies that will define TI's next generation of analog and embedded processing capabilities. As part of ATD, you won't just support production, you'll create the technology that makes it possible. Our engineers are working at the leading edge of computational

Full-time

Layout - TSMC 3n

Mountain View, California

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5d ago

Description: Seeking an experienced Analog Layout Engineer with TSMC N3 experience. Youll create high-quality, manufacturable analog layouts, collaborate with design engineers, and ensure designs meet electrical and DRC/LVS requirements. Requirements: Proven analog IC layout experience (TSMC N3 or similar) Proficiency with layout tools (Cadence Virtuoso, Synopsys, or equivalent) Strong understanding of analog performance, matching, and parasitics

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Contract

Depends on Experience

Analog Layout Engineer

San Jose, California

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3d ago

Job Title: Analog Layout Engineer (592074) Location: San Jose, CA (Onsite) Duration: Long Term Contract Description As an Analog Layout Engineer, you will be responsible for: Layout of Analog / High Speed transceiver circuit blocks such as amplifiers, drivers, ADC, DAC, LDO, PLL, filters, etc. in a timely manner. Layout of sensitive active / passive components including resistors, capacitors and inductors. Design verification including DRC, LVS, ERC and ANT and extraction. Block level floor pla

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Contract

90 - 110

Analog Layout Engineer

Oakland, California

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Today

Analog Layout Engineer Bay Area,CA (onsite) Longterm Contract Position OverviewWe are looking for an experienced Analog Layout Engineer with 8+ years of industry experience in advanced semiconductor process technologies. The ideal candidate will have strong expertise in high-speed analog/mixed-signal layout and hands-on experience with advanced 2nm, 3nm, and 5nm process nodes.The role involves ownership of complex analog and mixed-signal layout blocks, working closely with circuit designers and

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Contract, Third Party

Depends on Experience

High-Speed EDA/CAD Engineer (Analog & Mixed Signal)

Sunnyvale, California

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6d ago

Position:High-Speed EDA/CAD Engineer (Analog & Mixed Signal) Location:Sunnyvale, CA Hybrid 3 days onsite (relocation candidates is fine) Duration:24+ month contract Domain:Analog & Mixed Signal EDA/CAD Job Description: Client is seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high-speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow, including PDK installation and support, tool support and installation, layou

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Contract

$60 - $70

EDA/CAD Engineer (Analog & Mixed Signal)

Hybrid in Sunnyvale, California

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6d ago

EDA/CAD Engineer (Analog & Mixed Signal) Sunnyvale, CA Hybrid 3 days onsite (relocation candidates is fine) 12 Months 2 video calls Job Description: Seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow including PDK installation and support, tool support and installation, layout support, design support including schematic and simulation, design archive and tapeout

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Contract

75 - 80

Physical Design Engineer & DV Engineers

Sunnyvale, California

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20d ago

Job Title:PhysicalDesignEngineer(PD/PnR) Location Bay Area CA / Austin TX (Hybrid) Job Summary Seeking aPhysicalDesignEngineerwith strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion Compiler. The candidate will be responsible for implementation, timing closure, low-power integration, and signoff activities for complex SoCdesigns. Key Responsibilities Perform block-level and top-levelPhysicalDesignimplementation using Fusion Compiler. Drive floorplannin

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Full-time

160,000 - 170,000

Senior Staff CPU Backend Design Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: This individual leads the team to improve engineering efficiency, product quality and responsibility of working with microarchitecture and RTL design team to implement the designs, meeting aggressive power, area and performance goals using industry standard tools/flows. Works with CPU microarchitecture team to understand specifications and design trade-offs in pipeline and st

Full-time

USD 216,091.00 - 298,100.00 per year

IC Layout Engineer III

Princeton, New Jersey

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Today

Overview SRI International (formerly Sarnoff Corporation) is looking for a capable IC Layout Engineer in our Princeton, NJ office. The successful candidate will be presented with challenges in IC Layout and will be working closely with the SRI Princeton foundry and Design team in the development of form, fit and function emulation (not duplication) of obsolete microcircuits for the U.S. Government. Target microcircuits are emulated with pre-established gate arrays with only metallization determ

Full-time

USD 92,160.00 - 122,112.00 per year

Layout Engineer

Kirkland, Washington

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Today

Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world come join our team and see how YOU can make a difference. Job Description

Full-time

USD 70,000.00 - 110,000.00 per year

Associate Staff CAD Engineer - Physical Verification

Austin, Texas

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Today

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative soluti

Full-time

USD 124,600.00 - 231,400.00 per year

Principal Image Sensor Development Engineer

Rochester, New York

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Today

Overview SRI's Integrated Systems & Solutions Division (InSyS) designs leading-edge R&D technologies that power the systems end users depend on every day. From proof-of-concept to execution in the real world, we provide our customers the keys to achieve their objectives. Our goal: To uncover and deliver on profound possibilities for a smarter, safer, and more sustainable world. InSyS's Center for Advanced Imaging (CAI) is searching for a Principal CMOS/CCD image Sensor Development Engineer to

Full-time

USD 133,520.00 per year

Staff Engineer, SRAM Circuit Design

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 163,000.00 - 253,000.00 per year

Analog & RF IC Senior Layout Engineer

Irvine, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: The Opportunity Join an industry-leading team of innovators to build the next generation of high-tech hardware. As an Analog/RF Layout Engineer, you won't just watch from the sidelines-you'll be in the trenches of custom IP block design, translating c

Full-time

USD 109,700.00 - 175,500.00 per year

AI Silicon Physical Design Engineer

Sunnyvale, California

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Today

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprise

Full-time

USD 150,000.00 - 250,000.00 per year