RTL jobs in South San Francisco, CA

Sunnyvale, California

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6d ago

Required Qualifications: Bachelor s/Master s degree in Electrical Engineering or related field5 10 years of experience in RTL design and microarchitectureStrong expertise in RTL design using SystemVerilog/VerilogMicroarchitecture development for complex digital systemsPerformance optimization and pipelining techniquesExperience with simulation and debugging tools such as:Synopsys VCS / Cadence XceliumFamiliarity with synthesis and timing concepts (e.g., using Synopsys Design Compiler)Strong unde

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Contract, Third Party

Depends on Experience

ASIC Physical Design Engineer / RTL Synthesis Engineer

Remote

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Today

This is Ganesh from DELLA INFOTECH INC. We have an outstanding opening for you for the opportunity below. Please check the job description and share your updated resume, if you are interested. Hiring: Senior ASIC RTL-to-Physical Design (RTL2PD) / RTL Synthesis Engineer Location: San Jose, CA(onsite) Experience: 8 to 12 years What will Be Doing: RTL Synthesis, Constraint writing, validation, Static timing AnalysisWriting Scripts/Modiying scripts for RTL synthesis, SDC creation, STADebug synthesi

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Third Party, Contract

$60 - $65

Senior ASIC RTL DESIGN Engineer

Remote or Hybrid in Boston, Massachusetts

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11d ago

12 Months + CONTRACT Starting in September SKILLS: SENIOR ASIC RTL Design Verilog High Speed Memory Interface Experience Logic synthesis & Timing constraints Forward Error Correction (FEC), Bit Rate Error (BER) calculations Integrating Soft IP from Industry Standard and Custom IP into the design Bandwidth calculation Prefer experience with some of: LPDDR5 UFS/FlashPCIe Gen4/5

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Contract

90 - 130

Senior Emulation Engineer

San Francisco, California

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2d ago

Senior Emulation EngineerExperience: 8+ Years Location: Bay Area, CA Duration: Long Term Contract Key skills: palladium or veloce or zebu, timing closure, PCIe, usb Job DescriptionWe are looking for a Senior Emulation Engineer with strong experience in hardware emulation and SoC/ASIC verification. Required Skills8+ years of experience in Hardware Emulation / SoC VerificationHands-on experience with Cadence Palladium, Siemens Veloce, or Synopsys ZeBuStrong experience in emulation bring-up, debugg

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Contract, Third Party

Depends on Experience

Lead RTL/FPGA Design Engineer

Remote

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Today

About Aalyria: Aalyria is a leading technology company that supplies laser communications technology and temporospatial software-defined networking platforms to the aerospace industry. With technology acquired from Google, Aalyria is at the forefront of innovation in satellite and airborne mesh networks, as well as cislunar and deep-space communications. We are revolutionizing the orchestration and management of planetary mesh networks using any radio or optical spectrum, any orbit, and any har

Full-time

USD 170,000.00 - 195,000.00 per year

Connectivity Systems Engineer

San Francisco, California

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Today

Come join Apple's growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, with a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation,

Full-time

RFIC System Engineer

San Francisco, California

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Today

Come and join Apple's growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verifi

Full-time

Physical Design Engineer & DV Engineers

Sunnyvale, California

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21d ago

Job Title:PhysicalDesignEngineer(PD/PnR) Location Bay Area CA / Austin TX (Hybrid) Job Summary Seeking aPhysicalDesignEngineerwith strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion Compiler. The candidate will be responsible for implementation, timing closure, low-power integration, and signoff activities for complex SoCdesigns. Key Responsibilities Perform block-level and top-levelPhysicalDesignimplementation using Fusion Compiler. Drive floorplannin

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Full-time

160,000 - 170,000

Design Engineer

Sunnyvale, California

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9d ago

Payrate: $82.00- $85.00/hr. Summary Design Verification engineer for wearables silicon accelerator IPs testbench development, coverage-driven verification, RTL debug, and power/performance measurement. ResponsibilitiesDevelop and execute verification plans for RTL blocks/IPs across the subsystem.Build and maintain System Verilog/UVM test benches; write directed and constrained-random tests.Drive functional coverage and assertion (SVA) closure; run and triage regressions.Perform power/performan

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Third Party, Contract

$82 - $85

Emulation Verification Engineer

San Francisco, California

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Today

Imagine what you could at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengt

Full-time

Chip Simulation Engineer

San Francisco, California

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Today

This Jobot Job is hosted by: Grant Greenhalgh Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $180,000 - $250,000 per year A bit about us: We're a well-funded AI infrastructure startup developing modern software at the intersection of artificial intelligence, high-performance computing, and specialized hardware. The team is tackling complex performance challenges associated with running modern AI workloads across emerging compute architectur

Full-time

USD 180,000.00 - 250,000.00 per year

Digital Verification Engineer

South San Francisco, California

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Today

About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Job Description & Responsibilities: We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink's System-on-Chip (SoC) department under the Implant Team. This position offers

Full-time

USD 131,000.00 - 243,000.00 per year

Design Engineer III

Sunnyvale, California

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Today

Job Description Onsite 3 days in Sunnyvale, CA Job Description About the role: Design Verification engineer for wearables silicon accelerator IPs - testbench development, coverage-driven verification, RTL debug, and power/performance measurement. Responsibilities Develop and execute verification plans for RTL blocks/IPs across the subsystem. Build and maintain SystemVerilog/UVM testbenches; write directed and constrained-random tests. Drive functional coverage and assertion (SVA) closure; run a

Contract

USD 80.00 - 86.00 per hour

Application Engineer / Hardware / Customer-facing

San Francisco, California

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Today

Application Engineer - Hardware/Firmware (OEM Integrations) We're partnering with an innovative, venture-backed AI infrastructure company that is building cutting-edge hardware solutions at the intersection of AI, embedded systems, and data center technology. They're looking for an experienced Application Engineer - Hardware/Firmware to serve as the technical bridge between engineering and customers, helping bring complex hardware integrations from concept through production. This is a highly cu

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Full-time

$200000 - $250000

Sensing & Imaging FPGA Engineer

San Francisco, California

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Today

We live in a mobile and device-driven world where knowledge of the physical world around us is essential. Apple is meeting those needs as robustly and creatively as possible, and we're looking for people who want to help us achieve that commitment. The Imaging and Sensing Incubation team develops design solutions for user experiences and new technologies across iPhone, iPad, Apple Watch, MacBooks, and more. Our team creates early-stage hardware systems integrating cameras, non-vision sensors lik

Full-time

Sr. FPGA Design & Verification Engineer

San Francisco, California

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Today

Join the leader in entertainment innovation and help us design the future. At Dolby, science meets art, and high tech means more than computer code. As a member of the Dolby team, you'll see and hear the results of your work everywhere, from movie theaters to smartphones. We continue to revolutionize how people create, deliver, and enjoy entertainment worldwide. To do that, we need the absolute best talent. We're big enough to give you all the resources you need, and small enough so you can make

Full-time

USD 137,100.00 - 188,300.00 per year

ASIC/SOC DFT Engineer (Silicon Engineering)

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. ASIC/SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's

Full-time

USD 135,000.00 - 175,000.00 per year

Principal DFT Engineer (Silicon Engineering)

Palo Alto, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world'

Full-time

USD 220,000.00 - 355,000.00 per year

Senior ASIC Verification Engineer

San Francisco, California

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Today

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale. At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software developmen

Full-time

AI Silicon Physical Design Engineer

Sunnyvale, California

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Today

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. Cerebras works with the leading model labs, global enterprise

Full-time

USD 150,000.00 - 250,000.00 per year

RTL jobs in South San Francisco, CA, USA