TACL Jobs

1 - 20 of 332 Jobs

APPLICATION DEVELOPER IJob Title - APPLICATION DEVELOPER I

Judge Group, Inc.Company Name - Judge Group, Inc.

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Sacramento, California, USA

Full-time

Location: Sacramento, CA Salary: $40.00 USD Hourly - $45.00 USD Hourly Description: Our client is currently seeking a APPLICATION DEVELOPER I Job Title: Application Developer (Entry Level) General Description: The Application Developer is an entry-level position focused on learning and supporting the company's host systems. Under the guidance of senior staff, the developer will gain proficiency in coding languages and the full lifecycle of database application development, including design

Sr ServiceNow DeveloperJob Title - Sr ServiceNow Developer

Judge Group, Inc.Company Name - Judge Group, Inc.

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Sacramento, California, USA

Full-time

Location: Sacramento, CA Salary: $55.00 USD Hourly - $60.00 USD Hourly Description: Our client is currently seeking a Sr ServiceNow Developer Contract to Hire General Description: Lead the design, development, and implementation of ServiceNow solutions. Mentor junior developers and liaise with departments to achieve strategic IT goals. Tasks, Duties, Functions: Development and Leadership: Design, develop, and maintain ServiceNow configurations. Create custom applications and integrati

APPLICATION DEVELOPER IIJob Title - APPLICATION DEVELOPER II

Judge Group, Inc.Company Name - Judge Group, Inc.

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Sacramento, California, USA

Full-time

Location: Sacramento, CA Salary: $97,000.00 USD Annually - $115,000.00 USD Annually Description: Our client is currently seeking a APPLICATION DEVELOPER II Tech Stack Overview Fiserv as the system of record, supporting online banking and DataSafe, which has been in use for decades. Production support for database operations. Team includes three senior developers with 20+ years of experience (.NET REST Services, SQL, NoSQL). Long-term goal: Building a Full Stack development capability withi

Software Engineer 2 (HP NonStop - legacy Tandem) )Job Title - Software Engineer 2 (HP NonStop - legacy Tandem) )

U.S. BankCompany Name - U.S. Bank

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Saint Paul, Minnesota, USA

Full-time

At U.S. Bank, we're on a journey to do our best. Helping the customers and businesses we serve to make better and smarter financial decisions and enabling the communities we support to grow and succeed. We believe it takes all of us to bring our shared ambition to life, and each person is unique in their potential. A career with U.S. Bank gives you a wide, ever-growing range of opportunities to discover what makes you thrive at every stage of your career. Try new things, learn new skills and dis

Tandem Developer @ Chantilly, VAJob Title - Tandem Developer @ Chantilly, VA

Hecta Data LLC DBA VilwaaCompany Name - Hecta Data LLC DBA Vilwaa

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Chantilly, Virginia, USA

Contract

Qualifications & Experience Minimum Requirements (Must to Have) BS/BA degree in Computer Science/Information Systems or related field, or equivalent combination of education and work experience 5-7 years of experience required with TAL, Enscribe and SQL. Knowledge of C is a plus. Proven experience as a Tandem Developer, demonstrating successful contributions to Tandem-based projects. Strong understanding of the Tandem Non-Stop architecture and its components. Experience with integrating Tandem

Silicon Design Verification Engineer IIIJob Title - Silicon Design Verification Engineer III

Ascendion Inc.Company Name - Ascendion Inc.

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Burlingame, California, USA

Full-time

About Ascendion Ascendion is a full-service digital engineering solutions company. We make and manage software platforms and products that power growth and deliver captivating experiences to consumers and employees. Our engineering, cloud, data, experience design, and talent solution capabilities accelerate transformation and impact for enterprise clients. Headquartered in New Jersey, our workforce of 11,000+ Ascenders delivers solutions from around the globe. Ascendion is built differently to e

ASIC Timing EngineerJob Title - ASIC Timing Engineer

SmksoftCompany Name - Smksoft

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San Jose, California, USA

Contract

Job Title: Chip-Level Timing Constraint Development EngineerLocation: San Jose, CA - You must be already located in the San Jose area. Duration: 12+ MonthsVisa: Open (No restrictions) Responsibilities: 5 years of experience Define, develop, and validate timing constraints (SDC) for complex chip-level ASIC designs Perform static timing analysis (STA) to ensure full timing coverage and closure Collaborate with RTL, architecture, and physical design teams on clock structures and design intent Opti

CAD Engineer - Timing for Gate-Level Flows & MethodologiesJob Title - CAD Engineer - Timing for Gate-Level Flows & Methodologies

Apple, Inc.Company Name - Apple, Inc.

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No location provided

Full-time

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the techn

Silicon DV Engineer IIIJob Title - Silicon DV Engineer III

BCforwardCompany Name - BCforward

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Burlingame, California, USA

Contract

Silicon DV Engineer BCforward is currently seeking a highly motivated Silicon DV Engineer for an REMOTE opportunity. Position Title: Silicon DV Engineer Location: REMOTE Anticipated Start Date: 5/19/2025 Please note this is the target date and is subject to change. BCforward will send official notice ahead of a confirmed start date. Expected Duration: 6 Months Job Type: Contract - [FULL TIME (40 Hours a week)] Pay Range: $80.73/hr-$90.48/hr Please note that actual compensation may var

Infrastructure IngneerJob Title - Infrastructure Ingneer

Marlabs LLCCompany Name - Marlabs LLC

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Remote

Contract

A seasoned engineer with extensive experience in managing CISCO TAC cases and customer support tickets, combining technical and interpersonal skills to build, scale, and optimize AI systems. GPU Infrastructure Design & Optimization: Expert in designing, developing, and optimizing GPU-based infrastructures to support high-performance computing and AI/ML workloads.AI/ML Infrastructure Requirements: Proficient in collaborating with customers and stakeholders to define infrastructure needs for AI/ML

Technical Support Engineer 4 - GC1013128Job Title - Technical Support Engineer 4 - GC1013128

Juniper NetworksCompany Name - Juniper Networks

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Herndon, Virginia, USA

Full-time

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Technical Support Engineer 4 (Gov

Technical Support Engineer 4 - GC1013127Job Title - Technical Support Engineer 4 - GC1013127

Juniper NetworksCompany Name - Juniper Networks

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Herndon, Virginia, USA

Full-time

Staff, Technical Support Engineer - GC1013129Job Title - Staff, Technical Support Engineer - GC1013129

Juniper NetworksCompany Name - Juniper Networks

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Herndon, Virginia, USA

Full-time

Silicon Performance Modeling Engineer IVJob Title - Silicon Performance Modeling Engineer IV

BCforwardCompany Name - BCforward

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Seattle, Washington, USA

Contract

Silicon Performance Modeling Engineer IV BCforward is currently seeking a highly motivated Silicon Performance Modeling Engineer IV for a REMOTE (West Coast) opportunity. Position Title: Silicon Performance Modeling Engineer IV Location: REMOTE (West Coast) Anticipated Start Date: 4/22/2025 Please note this is the target date and is subject to change. BCforward will send official notice ahead of a confirmed start date. Expected Duration: 12 Months Job Type: Contract - [FULL TIME (40 Hours a

AI/ML DeveloperJob Title - AI/ML Developer

Micro Data Systems IncCompany Name - Micro Data Systems Inc

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Remote

Full-time

NO C2C OR THIRD PARTY INQUIRIES What You ll Be Doing: Work with your fellow sharks to design, develop, and optimize the next generation of GPU infrastructure Work with customers and stakeholders to define and refine infrastructure requirements needed to support their AI/ML workload Work with infrastructure technical leaders to define infrastructure requirements to store, move, and manipulate large datasets Guide performance teams on industry standard testing methodologies and help optimize for G

ASIC STA ConsultantJob Title - ASIC STA Consultant

VKore Solutions LLCCompany Name - VKore Solutions LLC

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Longmont, Colorado, USA

Contract, Third Party

KEY RESPONSIBILITIES: Developing block and SoC timing constraints, full chip STA setup and signoff of multi-corner multi-voltage designs. Owning timing flow and execution to meet SoC timing requirements including timing budgeting, repeater planning, constraints/exceptions generation and management Engaging closely with block and SoC design teams to understand the design requirements, STA constraints, and convergence challenges. Engaging closely with physical implementation teams to ensure des

Chip-Level Timing Constraint Development EngineerJob Title - Chip-Level Timing Constraint Development Engineer

SmksoftCompany Name - Smksoft

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San Jose, California, USA

Contract

Role: Chip-Level Timing Constraint Development Engineer Location: San Jose, CA Onsite Role JD: As a Chip-Level Timing Constraint Development Engineer, you will be responsible for defining, developing, and validating timing constraints for complex ASIC designs at the chip level. Your role will involve close collaboration with cross-functional teams, including RTL designers, physical design engineers, and verification teams, to ensure robust timing closure and sign-off. Key Responsibilities: Deve

ASIC STA & CAD EngineeringJob Title - ASIC STA & CAD Engineering

Coretek LabsCompany Name - Coretek Labs

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Longmont, Colorado, USA

Full-time, Contract, Third Party

Job Title: ASIC STA & CAD Engineering Location: Longmont, Colorado (Hybrid) Duration: Long Term Contract Rate: $50-60/hr. Domain: Engineering Key Responsibilities: Developing block and SoC timing constraints, full chip STA setup and signoff of multi-corner multi-voltage designs. Owning timing flow and execution to meet SoC timing requirements including timing budgeting, repeater planning, constraints/exceptions generation and management Engaging closely with block and SoC design teams to under

ASIC EngineerJob Title - ASIC Engineer

AdientOne LLCCompany Name - AdientOne LLC

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California, USA

Contract

Role: ASIC Engineer Location: Clara CA 95054 OR Longmont CO 80503 Duration: 12+months Job Description: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scrip

PCB Simulation EngineerJob Title - PCB Simulation Engineer

Octigo Solutions IncCompany Name - Octigo Solutions Inc

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Austin, Texas, USA

Third Party, Contract

PCB Simulation Engineer to perform precise correlation of PCB interconnect measurements with frequency-domain simulation models. This role requires deep knowledge of PCB manufacturing artifacts, such as copper roughness, and their integration into electromagnetic simulations. Perform electromagnetic simulations of PCB interconnects to ensure high-accuracy correlation with measured data. Develop and specify interconnect structures and requirements for effective fixture removal in lab measurements