Fpga design verification engineer jobs

El Segundo, California

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Today

This posting is for a contract assignment and is not a full-time employment offer with Boeing. Candidates selected for roles will be employed as contract workers through a Boeing approved 3rd party for the duration of the specified project. Analyzes customer and system requirements to develop basic architectural approaches and detailed specifications for various electronic products. Develops high-level and detailed designs consistent with requirements and specifications. Validates designs throug

Full-time

FPGA Design/Verification Engineer

Owego, New York

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Today

Location: Owego, NY Salary: $70.00 USD Hourly - $80.00 USD Hourly Description: About the Role We are seeking an experienced FPGA Engineer to support advanced R&D programs involving ASIC and FPGA development. The ideal candidate will contribute to the design, simulation, verification, integration, and testing of high-speed digital systems, DSP solutions, communication interfaces, and System-on-Chip (SoC) implementations. This role requires close collaboration with multidisciplinary engineering

Contract

USD 70.00 - 80.00 per hour

ASIC / FPGA Design Verification Engineer - (Lead or Senior)

El Segundo, California

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Today

ASIC / FPGA Design Verification Engineer - (Lead or Senior) Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/ FPGA Design Verification Engineers - (Lead or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in El Segundo or Huntington Beach, CA. Mission Develop scalable technical leaders who combine strong verification fundamentals, fluent UVM capability, technical ownership, systems awareness,

Full-time

USD 146,200.00 - 197,800.00 per year

ASIC / FPGA Design Verification Engineer - (Associate or Experienced)

El Segundo, California

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Today

ASIC / FPGA Design Verification Engineer - (Associate or Experienced) Company: Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design Verification Engineers to join us as part of our Boeing Electronic Products team at the heart of Boeing's products in El Segundo or Huntington Beach, CA. Mission Develop adaptable verification engineers who build strong technical fundamentals, become independent owners of assigned scope, and grow from guide

Full-time

USD 98,600.00 - 133,400.00 per year

Staff Engineer - FPGA Design/Verification

Grand Rapids, Michigan

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Today

Job Description Summary GE Aerospace is seeking an experienced Staff Engineer - FPGA Design/Verification to lead the development of custom logic for advanced avionics hardware. This role supports the full FPGA design lifecycle-from requirements and architecture through design, verification, documentation, and certification. The successful candidate will bring strong FPGA design expertise, technical leadership, and the ability to manage multiple complex engineering efforts in a regulated aerospa

Full-time

Design Verification Engineer

San Jose, California

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3d ago

We are seeking Design Verification Engineer with exposure on Developing and maintaining UVM/SystemVerilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems) Key Skill: SV/UVM, PCIe/Ethernet/HBM What You'll Be Doing: Strong in SV/UVM scale test bench AXI expertise, NOC/Crossbar, Performance Regression/Triage and coverage closure Need asap Program has already started and is in execution Ability to work on Amazon tools, flows, methodology. Work is in start-up mode

Easy Apply

Contract, Third Party

Depends on Experience

ASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA)

Reading, Massachusetts

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Today

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We

Full-time

USD 98,700.00 - 157,900.00 per year

Hardware Design Verification Engineer

Dallas, Texas

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3d ago

Role - HW Design Verification Engineer Location: Dallas, TX HW Design Verification Engineer: Candidate must have min 3+ years of hands-on exp in: HW verification planning based on product and design requirements.Definition of verification scope, test cases, test methods, and acceptance criteria.Hardware/unit bring-up and functional verification.RF and electrical performance verification.Verification under applicable operating and corner conditions.Test environment setup, measurement equipment op

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Contract, Third Party

$40,000 - $80,000

Design Verification Engineer

Remote

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Yesterday

Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirementsBuild UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/code coverageDebug simulation failures and work closely with RTL designers to resolve issuesExecute regression runs, analyze results

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Contract

40 - 50

Design Verification Engineer

San Jose, California

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3d ago

Client: Etched Design Verification Engineer 6 Openings Location: San Jose, CA & Austin, TX - onsite Please find the JD: Job Summary We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ab

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Full-time, Third Party

Depends on Experience

Design Verification Engineer

San Jose, California

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Yesterday

Hi, Full Time / Permanet Role Job Title: Design Verification Engineer Location : San Jose, CA & Austin, TX - Onsite End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors Thanks and Regards, Praveenkumar Technical Recruiter

Easy Apply

Full-time

Depends on Experience

Design Verification Engineer (Junior to Principal)

Saint Paul, Minnesota

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Today

Location: St. Paul, MN Salary: $130,000.00 USD Annually - $220,000.00 USD Annually Description: We are seeking a Junior - Principal ASIC Design Verification Engineer to provide technical leadership across advanced digital, mixed-signal, ASIC, SoC, and FPGA verification programs. This is a highly visible role for a seasoned verification professional who excels at defining verification strategy, building scalable methodologies, solving complex technical challenges, and mentoring engineering team

Contract

USD 130,000.00 - 220,000.00 per year

Electrical Design Verification Engineer

Redmond, Washington

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Today

Fresh Consulting is a design-led, software development and hardware engineering company, offering end-to-end digital services to help companies innovate. We bring together amazing UX designers, sophisticated developers, digital strategists, and top-notch engineers to help companies create fresh experiences that connect humans, systems, and machines. We've been growing fast and need someone to help us continue to manage the delivery of high-quality work in a fast-paced environment. See more at fr

Full-time

USD 75.00 - 85.00 per hour

Formal Design Verification Engineer

San Jose, California

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4d ago

Role: GPU Formal Design Verification Location: San Jose, CA (Onsite: M-F) Duration: 6 Months Contract Pay rate: $85-95/hr W2 Description: Formal Design Verification Engineer, you will be responsible for developing formal constraints, checks, and cover properties to new and existing design blocks towards verifying sequential equivalence for clock gating logic & so, verifying design features using assertions and verifying datapath equivalence of C and RTL models. You will diagnose formal failures

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Third Party, Contract

85 - 95

Senior Design Verification Engineer

San Francisco, California

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Yesterday

Senior Design Verification Engineer Location: Bay Area, CA (Complete Onsite) Experience: 5+ years (Relevant) Key Skill: SV/UVM, AXI expertise, NOC/Crossbar, Performance What You'll Be Doing: Strong in SV/UVM scale test bench AXI expertise, NOC/Crossbar, Performance Regression/Triage and coverage closure Need asap Program has already started and is in execution ARM CPU_SS (Cortex, Neon), Ability to work with Firmware team, Emulation is plus Coresight Debug Arch, DMA, NIC (AXI), C/SV mixe

Easy Apply

Contract

Depends on Experience

Senior Design Verification Engineer

San Francisco, California

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2d ago

Key Skill: SV/UVM, AXI expertise, NOC/Crossbar, Performance What You'll Be Doing: Strong in SV/UVM scale test bench AXI expertise, NOC/Crossbar, Performance Regression/Triage and coverage closure Need asap Program has already started and is in execution ARM CPU_SS (Cortex, Neon), Ability to work with Firmware team, Emulation is plus Coresight Debug Arch, DMA, NIC (AXI), C/SV mixed testing Block-level DV Testbench Cocotb Python based System Verilog Framework

Easy Apply

Contract, Third Party

$50 - $60

Sr Design Verification Engineer, DRAM

Boise, Idaho

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron?s DRAM Design Engineering Group (DDEG) is where innovation meets excellence. We are advancing memory and storage technologies through collaborative engineering and creative problem-solving.

Full-time

Design verification engineer (C++ and Ethernet/DSP)

Boston, Massachusetts

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Yesterday

Senior DV Enginner with good experience in C++C++ will be used verification (Via Teal/Truss) Not SV/UVMCandidate will have experience with Either DSP or Ethernet protocols

Easy Apply

Third Party, Contract

Depends on Experience

FPGA Verification Engineer II

Westminster, Colorado

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Today

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals

Full-time

USD 113,000.00 - 136,000.00 per year

FPGA Verification Engineer II

Austin, Texas

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Today

Full-time