Ucie jobs in san jose, ca

San Jose, California

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11d ago

Job Title: Sr. Emulation Engineer Location: San Jose, CA (Onsite) Exp: 10+ years Key Skills: Veloce, Palladium, or ZeBu, PCIe and UCIe and memory technologies such as LPDDR and HBM Set up and maintain Siemens Veloce emulation and prototyping platformsAdapt SoC designs for Emulation and PrototypingDevelop and debug emulation testbenches and system-level environmentsSupport pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and valid

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Third Party, Contract

Depends on Experience

Emulation Engineer

Remote or California

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Today

Senior Emulation Engineer Location: San Jose, CA (Remote) Experience: 10+ Years We are hiring an experienced Senior Emulation Engineer with strong expertise in Siemens Veloce, Cadence Palladium, or Synopsys ZeBu. Required Skills: Hands-on experience with Veloce, Palladium, or ZeBu emulation platforms Experience with FPGA prototyping (HAPS, Protium, or proFPGA) Strong knowledge of PCIe, UCIe, LPDDR, and HBM Solid understanding of SoC architecture, RTL (Verilog/SystemVerilog), and digital des

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Full-time, Part-time, Contract, Third Party

ASIC Emulation Engineer

San Jose, California

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19d ago

Key Skills:Veloce, Palladium, or ZeBu, PCIe and UCIe and memory technologies such as LPDDR and HBM Set up and maintain Siemens Veloce emulation and prototyping platforms Adapt SoC designs for Emulation and Prototyping Develop and debug emulation testbenches and system-level environments Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. Collaborate with design and verification teams to isolate design issues and

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Contract

60 - 75

Senior Emulation Engineer

San Jose, California

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Today

We have an open Emulation Engineer position in San Jose, USA. Senior Emulation Engineer Location: San Jose, CA Exp: 10+ years Key Skills: Veloce, Palladium, or ZeBu, PCIe and UCIe and memory technologies such as LPDDR and HBM Set up and maintain Siemens Veloce emulation and prototyping platforms Adapt SoC designs for Emulation and Prototyping Develop and debug emulation testbenches and system-level environments Support pre-silicon validation, power/performance analysis, and early software br

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Third Party, Contract

Depends on Experience

Signal Integrity Engineer

Mountain View, California

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Today

Title: Signal Integrity Engineer (Onsite) 3-months CTH Location: Mt. View, CA (must be in the Bay Area-onsite work required) Visa: , GC-EAD only. About This Role: Client is looking for a Signal Integrity engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with influencing the package and system architecture, design, and analysis through lab bring-up to meet the product's signal integ

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Contract, Third Party

Signal Integrity Engineer //Mt. View, CA//(AV)

Mountain View, California

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3d ago

Hi, Hope youre doing well!! Please find the requirement below. If you find yourself comfortable with the requirement please reply back with your updated resume or call me back at ) Signal Integrity Engineer 3-months CTH Location:Mt. View, CA (must be in the Bay Areaonsite work required) LinkedIn Profile About This Role a Signal Integrity engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging

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Contract, Third Party

Depends on Experience

Sr. Principal Engineer, SoC Architect

San Jose, California

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Today

Senior Principal Engineer, SoC Architect Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Aya

Full-time

USD 250,000.00 - 304,000.00 per year

Interface IP, Applications Principal Engineer - 18153

Sunnyvale, California

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Today

Descriptions & Requirements Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned

Full-time

Principal Engineer, Network Protocol Architect

San Jose, California

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Today

Network Protocol Architect Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD, MediaTek and Intel, and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-pa

Full-time

USD 180,000.00 - 250,000.00 per year

Signal Integrity Engineer

Mountain View, California

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Today

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage , capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of dat

Full-time

USD 157,000.00 - 176,000.00 per year

Optical Validation Engineer, Principal

San Jose, California

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Today

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

Full-time

USD 160,000.00 - 200,000.00 per year

PCIe, CXL and Highspeed IO Validation Engineer

Santa Clara, California

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Today

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we're looking for talent who feel the same: people who want to leave the planet better than they found it, those who don't shy away from humanity's challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing

Full-time

USD 170,100.00 per year

Principal Engineer, SOC Integration

San Jose, California

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Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 219,000.00 - 351,000.00 per year

Principal Engineer, Design Verification - DDR Memory Subsystems

San Jose, California

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Today

Job Details: Job Description: About Altera At Altera , our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets including AI, cloud, networking, edge computing, and embedded systems. About the Role

Full-time

USD 209,500.00 - 299,200.00 per year

Principal Engineer, Digital Verification and Emulation

San Jose, California

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Today

Principal Engineer, Digital Verification & Emulation Location: San Jose, CA - on-site Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics, or CPO, we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry leaders including NVIDIA, AMD, MediaTek and Intel, and manufactured in partnership with the world's leading semi

Full-time

USD 190,000.00 - 250,000.00 per year

Principal Ethernet Scale-Out Architect, AI Data Center

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is seeking an experienced Hardware Scale-Out Architect to help define the next generation of AI datacenter products. This role is responsible for architecting large-scale Ethernet-based AI/datacenter fabrics that connect servers, accelerators, racks, and multi-rack clusters. The ideal candidate will bring deep expertise across Ethernet, UEC, RoCE/RDMA, NICs/SuperNI

Full-time

USD 192,000.00 - 304,900.00 per year

Principal Engineer, Signal-Integrity and Power-Integrity

San Jose, California

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Today

Job Title: Principal Engineer, Signal-Integrity and Power-Integrity Office Location: San Jose, CA Work Model: Onsite About SK hynix America At SK hynix America, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge

Full-time

USD 185,000.00 - 220,000.00 per year

Distinguished Engineer (Chiplet Lead - Photonic Fabric)

Santa Clara, California

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Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 209,770.00 - 314,300.00 per year

Advanced Power Integrity & Power Delivery Architect

Palo Alto, California

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Today

About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we constantly challenge what's possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it

Full-time

USD 237,200.00 - 296,500.00 per year

UCIe Applications Engineering Architect

Sunnyvale, California

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Today

Full-time

Ucie jobs in San Jose, CA, USA