In-Person Interview Required! Staff Physical Design Engineer Minneapolis, MN 9 + Months Role: Full back-end implementation ownership of a custom 36 I/O mixed-signal PHY test chip from netlist to GDSII tape-out. What You'll Do: Own mixed-signal floorplanning, analog/digital partitioning, and PDN design. Execute full-chip P&R using Cadence Innovus. Drive timing closure (Tempus) and power integrity (Voltus) across PVT corners. Close DRC/LVS/ERC sign-off using Mentor Calibre. What You Bring: BS/