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San Jose, California

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Yesterday

Here is OUR CLIENT REQUIREMENT which can be filled immediately. Job Title: ASIC Test Engineer Location: San Jose, CA, relocation assistance provided (onsite only) Job Type: Full time job Overview We are seeking an experienced ASIC Test Engineer to support the industrialization of new semiconductor products. This role is part of the Product Engineering team within the DSRD unit and involves working closely with global customers, foundries, and test partners to deliver high-quality ASIC test solut

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Full-time

Depends on Experience

Mixed Signals ASIC Test Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: The Mixed Signals ASIC Products team is looking for a Digital Device Verification Test engineer. This position will involve working with designers to define tests, and implementing and automating them for verifying digital circuits on mixed signal IPs.

Full-time

USD 141,300.00 - 226,000.00 per year

Senior ASIC DV Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: Architecting block and full-chip verification e

Full-time

USD 141,300.00 - 226,000.00 per year

ASIC Verification Engineer

Santa Clara, California

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9d ago

Position:ASIC Verification Location:Santa Clara CA & Austin, TX Contract/ Fulltime Job Responsibilities: Architect and develop verification environment, testbench components, and reference models for designs at block and system level.Develop a comprehensive test plan and implement test cases.Verify design in block and chip-level environments using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification.Perform RTL code coverage, assert

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Full-time

Depends on Experience

ASIC Implementation Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal int

Full-time

USD 141,300.00 - 226,000.00 per year

Senior ASIC Design Engineer - Clocks IP

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life's work, to amplify human

Full-time

USD 136,000.00 - 218,500.00 per year

Staff Firmware Engineer - high-speed interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

•

Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 111,070.00 - 166,400.00 per year

Principal Firmware Engineer - high-speed optical interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

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Today

Full-time

USD 154,680.00 - 231,700.00 per year

ASIC DFT Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom's ASIC Product Division (APD) is seeking candidates for a DFT position at our San Jose, California, Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, throug

Full-time

USD 141,300.00 - 226,000.00 per year

ASIC Methodology Engineer

Santa Clara, California

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Today

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: The DTECH team is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal and external EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology, and IP, and foundation IP development. About the Role As a member of the DTECH

Full-time

USD 153,200.00 - 229,800.00 per year

ASIC/SoC Presales Applications Engineer - 16648

Sunnyvale, California

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Today

Descriptions & Requirements Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasone

Full-time

Senior ASIC Engineer

Santa Clara, California

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Today

Our Mission At Palo Alto Networks , we're united by a shared mission-to protect our digital way of life. We thrive at the intersection of innovation and impact, solving real-world problems with cutting-edge technology and bold thinking. Here, everyone has a voice, and every idea counts. If you're ready to do the most meaningful work of your career alongside people who are just as passionate as you are, you're in the right place. Who We Are In order to be the cybersecurity partner of choice, w

Full-time

USD 173,600.00 - 280,700.00 per year

Semiconductor ATE Test Engineer (34381)

Sunnyvale, California

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Today

Local Candidates Only - Must currently reside in the Sunnyvale, CA area. Hybrid role requiring 3 days per week onsite. Role Overview Support R&D and production testing operations for an ASIC-focused semiconductor environment. This role bridges vendor coordination, wafer-level ATE platform support, production logistics, and process documentation - with a strong emphasis on yield improvement, compliance to TL/ISO manufacturing standards, and supporting engineering releases through pilot and produ

Full-time

Semi Conductor Test Engineer

Hybrid in Sunnyvale, California

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9d ago

Interface with external vendors for R&D and production testing Ensure and correlate test SW and HW to written Test Plan Production yield tracking, milestone tracking, problem assessment/disposition and invoice tracking Wafer level ATE platform support of production, yield analysis, failure Pareto s and yield improvement Production logistics including ASIC wafer tracking and travelers Supporting engineering releases through pilot runs and production Develop, debug and release production methods a

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Contract

$80 - $90

ASIC Verification Engineer - ARM - Remote

Remote

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5d ago

Position: ASIC Verification Engineer ARMLocation: Remote Job Description:We are seeking an experienced ASIC Verification Engineer with a strong background in ARM IPs to contribute to the development and verification of cutting-edge hardware designs. This role will focus on ensuring the quality, performance, and reliability of CPU, GPU, and debug IP blocks, while collaborating with global verification teams to drive best-in-class verification practices. Must-Have: Cortex-A based verification ex

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Third Party, Contract

Depends on Experience

FPGA Verification Engineer

San Jose, California

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Today

Position: FPGA Verification Engineer Location: San Jose, CA - Onsite Job Description & Responsibilities Own verification of entire FPGA design used in high-end router productsUnderstand design specifications and interact with design engineers to identify verification scenariosCreate test plans, constrained-random verification environments, test cases, regressions, and coverage reportsIdentify and write all types of coverage measures for stimulus and corner-casesQualifications Strong academic ba

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Contract

Depends on Experience

FPGA Design Verification Engineer

Mountain View, California

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7d ago

FPGA Design Verification EngineerIntroduction:The FPGA Design Verification Engineer will play a crucial role in the team, leading FPGA design verification activities for advanced wireless communication systems. They will be responsible for developing, implementing, and validating DSP algorithms and functional blocks, contributing to phased array and beamforming projects, and ensuring high performance and reliability in FPGA-based systems. Responsibilities:Extensive experience in FPGA design and

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Contract, Third Party

70 - 90

ASIC & FPGA Design Engineer Sr

Remote or Orlando, Florida

•

Today

Job Description You will be the Senior ASIC & FPGA Design Engineer for the Multi Domain Missile Warning Payload team. Our team creates large format, high frame rate imaging sensor systems that provide survivability enhancing situational awareness for air, space and surface platforms. What You Will Be Doing As the Senior ASIC & FPGA Design Engineer you will work side by side with a PLD subject matter expert to architect, design and implement programmable logic solutions for the imaging sensor s

Full-time

USD 101,000.00 - 178,135.00 per year

ASIC & FPGA Design Engineer Senior

Remote or Orlando, Florida

•

Today

Job Description You will be the Senior ASIC & FPGA Design Engineer for the Laser Weapon System (LWS) Turret Closing team. Our team is responsible for delivering high performance, low latency FPGA based closed loop motor control solutions that enable rapid, precise turret positioning for next generation directed energy weapons. What You Will Be Doing As the Senior ASIC & FPGA Design Engineer you will lead the end to end development of the FPGA motor control hardware, translating system level pe

Full-time

USD 101,000.00 - 178,135.00 per year

PDK and CAD Support Engineer - Integrated Circuit Design (ASIC and MMIC)

Remote or New Hampshire

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3d ago

Date Posted: 2026-03-12 Country: United States of America Location: US-NH-REMOTE Position Role Type: Remote U.S. Citizen, U.S. Person, or Immigration Status Requirements: Security Clearance Type: None/Not Required Security Clearance Status: Not Required At RTX, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering

Full-time

USD 107,500.00 per year

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