San Jose, California
•
Today
Position:Design Verification Engineer IV Job Description:WhatYou\'llBeDoing: Strong SV/UVM expertiseAXI/NOC/Ethernet/PCIe/UCIe Switch expertise is neededCPU ARM/RISC-V with C knowledgeRegression & Coverage Closure What We Are Looking For: Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development.Develop complex self checking test benches with constra
Full-time















