San Jose, California
•
Today
Job: SoC Design Verification Engineer (DV Engineer) Location: MUST work onsite in San Jose Visa: GC. EAD LinkedIn : Must We are looking forstrong SoC DVcandidates. System-level experience is highly preferred. AXI4 experience is preferred Strong SystemVerilog and UVM skillsScripting experience (Python/Perl/Shell) is a plusC-based programming experience is a strongplusExperience with infrastructure tasks (testbench development, VIP integration, etc.)Solid debugging and problem-solving skillsGo
Easy Apply
Third Party, Contract
50 - 60










