Santa Clara, California
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Today
Analog Design Engineer Santa Clara, CA- Onsite Salary: Market- FTE Start: Immediate Requires good SerDes experience Minimum Qualifications:The ideal candidate should have a minimum of MS in Electrical Engineeringwith 8+ years of experience in high-speed serial links and deep knowledge of analog CMOS/BiCMOS designs in deep sub-micron process technologies.Hands-on circuit design experience of SerDes blocks like Equalizers, PLL, Phase-Interpolators, CDR, etc. for 28Gbps+ data ratesExperience with d
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Full-time, Third Party
Depends on Experience













