DFT Engineer - Santa Clara, CA

Hi, Job Title : Senior DFT Engineer [ATPG , MBIST, IO Test, Clock Verification] Location : Santa Clara, CA Experience : 4+ Years in DFT Required Skills & Qualifications 4+ years of hands-on experience in DFT and ATPGfor SoC or ASIC designsStrong understanding of DFT fundamentalsincluding controllability, observability, and scan-based testingProven expertise in ATPG pattern generation, analysis, and debugExperience with MBIST, including memory test architectures and diagnosticsKnowledge of IO Tes