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Job Title: Lead ASIC DFT Engineer Location: San Jose, CA - Must Be Able To Go In Office Once Or Twice A Month Duration: Long term Experience Required: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) Role Summary: We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, bo
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