Design Verification Engineer Jobs

1 - 20 of 1,144 Jobs

Design verification EngineerJob Title - Design verification Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Mountain View, California, USA

Third Party, Contract

A client of Innova Solutions is immediately hiring a Design verification Engineer Position type: Contract Duration: Contract Location: Mountain View, CA (Hybrid) As a Design verification Engineer, you will need: Must-Have Skills: 9+ years of experience as Design Verification EngineerStrong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirementsBuild UVM/System Verilog-

Design Verification EngineerJob Title - Design Verification Engineer

VeearCompany Name - Veear

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Sunnyvale, California, USA

Full-time

Requirements: Thorough knowledge of microprocessor or SOC design with 2+ years of direct work experience in one or more of the following areas:High performance cache controllers - pipeline design, hazard detection, parity/ECC generation, coherency policies, replacement policiesCoherent on-chip Fabrics for high performance SOCs and design of associated control structuresKnowledge of SystemVerilogExperience with simulators and waveform debugging toolsKnowledge of logic design principles along with

Design Verification EngineerJob Title - Design Verification Engineer

Canvendor IncCompany Name - Canvendor Inc

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Dallas, Texas, USA

Third Party, Contract

Job Title: DV Engineer Job Location: Dallas, TX (Onsite) Duration: 12+ Months Job Description: Strong in SoC verificationShould have worked on ARM processorShould have expertise in SV and UVMShould be well versed in AMBA bus protocolsGood debugging skills

Sr. ASIC Design Verification Engineer, Project KuiperJob Title - Sr. ASIC Design Verification Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLCCompany Name - Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.The Role:Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The te

Sr. ASIC Design Verification Engineer, Project KuiperJob Title - Sr. ASIC Design Verification Engineer, Project Kuiper

Amazon Kuiper Manufacturing Enterprises LLCCompany Name - Amazon Kuiper Manufacturing Enterprises LLC

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San Diego, California, USA

Full-time

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. The Role: Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The

Design Verification Engineer - SoC (Associate Level)Job Title - Design Verification Engineer - SoC (Associate Level)

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Santa Clara, California, USA

Full-time

Design Verification Engineer SoC (Associate Level) We are building high-performance silicon for AI and compute-intensive workloads. We re looking for an Associate Design Verification Engineer to support SoC-level debug, triage, and verification focused on complex subsystems like PCIe and IOMMU. Scope: Perform SoC-level design verification with emphasis on debugging and triage. Work with PCIe and IOMMU/MMU, including VA to PA address translation. Analyze waveforms and root-cause functional and i

Design Verification EngineerJob Title - Design Verification Engineer

Mirafra IncCompany Name - Mirafra Inc

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San Jose, California, USA

Full-time

Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simulations and work with design engineers to verify fixes. Write diagnostics for validation of FPGA prot

Senior Design Verification Engineer - Ethernet PHY/PCSJob Title - Senior Design Verification Engineer - Ethernet PHY/PCS

SivaltechCompany Name - Sivaltech

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Santa Clara, California, USA

Contract, Third Party

Job Title: Senior Design Verification Engineer - Ethernet PHY/PCS Location: Santa Clara, CA Job Type: Contract, Full-time Experience: 7+ years We're seeking an experienced Senior Design Verification Engineer with expertise in Ethernet PHY or PCS to join our team in Santa Clara, CA. Responsibilities: - Develop and execute verification plans for Ethernet PHY or PCS - Create and maintain testbenches and test suites - Collaborate with design engineers to resolve verification issues - Strong understa

Design Verification Engineer - SOCJob Title - Design Verification Engineer - SOC

Millennium Software, Inc.Company Name - Millennium Software, Inc.

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Round Rock, Texas, USA

Contract

Millennium Software & Staffing is looking for Design Verification Engineer SOC at Round Rock, TX Below are the details: Title : Design Verification Engineer SOC Location : Round Rock, TX TOP SKILLS: SOCUVM, System VerilogIntegrate GPU, CPU, Arm Based SystemPCIe, DDR, Ethernet, Bus ProtocolsPython Scripting Candidate should have average or above average Python SkillsExperience: 8+ years of experience in SOC, SystemVerilog/UVM methodologyExperience in EDA tools and scripting (Python, TCL, Perl, Sh

Design Verification Engineer RISC-V CPU DevelopmentJob Title - Design Verification Engineer RISC-V CPU Development

Xpeerant IncorporatedCompany Name - Xpeerant Incorporated

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Portland, Oregon, USA

Full-time

Design Verification Engineer RISC-V CPU Development Are you passionate about cutting-edge CPU architecture and ready to take your verification skills to the next level? We re partnering with a global leader in RISC-V processor design to find talented Design Verification Engineers to join their high-impact VLSI team. You ll work alongside seasoned architects and engineers to verify next-generation RISC-V CPU cores, develop test benches from the ground up, and help shape the future of custom CPU I

Design Verification EngineerJob Title - Design Verification Engineer

Avance ConsultingCompany Name - Avance Consulting

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Mountain View, California, USA

Contract

Job Description Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code coverage Debug simulation failures and work closely with RTL designers to resolve issues Execute regressio

Design Verification EngineerJob Title - Design Verification Engineer

Innova Solutions, IncCompany Name - Innova Solutions, Inc

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Mountain View, California, USA

Contract

A client of Innova Solutions is immediately hiring for a Design Verification Engineer Position type: Contract Location: Mountain View, CA-Onsite As a Design Verification Engineer, you will be responsible for: Job description: Strong understanding of SV and UVM and good debugging skills.Understanding of AMBA protocols.Understand design specs and develop test plans based on functional and architectural requirements.Build UVM/System Verilog-based verification environments for IP/subsystem/SoC leve

Design Verification EngineerJob Title - Design Verification Engineer

LeadStack, Inc.Company Name - LeadStack, Inc.

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No location provided

Full-time, Contract

Lead Stack Inc. is an award-winning, one of the nation's fastest-growing, certified minority-owned (MBE) staffing services provider of contingent workforce. As a recognized industry leader in contingent workforce solutions and Certified as a Great Place to Work, we're proud to partner with some of the most admired Fortune 500 brands in the world. TITLE: Design Verification Engineer LOCATION: San Jose CA/ Austin TX DURATION: 5+ Months with possible extension Rate: $90-$110/hr on W2 Job Descriptio

CAD/EDA Silicon Design/Verification Infrastructure EngineerJob Title - CAD/EDA Silicon Design/Verification Infrastructure Engineer

Datum Software, Inc.Company Name - Datum Software, Inc.

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Santa Clara, California, USA

Full-time

Position Title: CAD/EDA Silicon Design/Verification Infrastructure Engineer Location: Santa Clara, CA Term: Possible 3-Month Contract-to-Hire (CTH) Job Description: We are seeking a CAD/EDA Silicon Design/Verification Infrastructure Engineer with strong experience in SoC/IP design and verification infrastructure. The ideal candidate will have hands-on expertise in Python, SystemVerilog/UVM, and working in Linux-based environments. Minimum Qualifications: 5+ years of experience in EDA/CAD for SoC

Satellite or Space FPGA Design / Verification EngineerJob Title - Satellite or Space FPGA Design / Verification Engineer

Sun Technologies,Inc.Company Name - Sun Technologies,Inc.

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Remote

Contract

Job Title: Satellite or Space FPGA Design / Verification Engineer Duration: up to 3 months contract with possible extension Location: Remote Work / Work from Home Work Schedule: 5/40-1st Shift Pay Rate: $87.19/hr on W2 [the pay rate may differ depending on your skills, education, experience, and other qualifications] Featured Benefits: Medical Insurance in compliance with the ACA401(k)Sick leave in compliance with applicable state, federal, and local laws Job Description: ASIC/FPGA Engineer an

Design and Verification Engineer || Dallas, TX (Onsite)Job Title - Design and Verification Engineer || Dallas, TX (Onsite)

Zodiac Solutions Inc.Company Name - Zodiac Solutions Inc.

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Texas, USA

Part-time, Contract, Third Party

Position : Design and Verification Engineer Location: Dallas, TX (Onsite) Experience : 10+ Years Must Job Description: Strong in SoC verification Should have worked on ARM ptrocessor Should have expertise in SV and UVM Should be well versed in AMBA bus protocols Good debugging skills

EDVT (Electrical Design Verification Test) EngineerJob Title - EDVT (Electrical Design Verification Test) Engineer

Recruitment.aiCompany Name - Recruitment.ai

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San Jose, California, USA

Contract

Position: EDVT (Electrical Design Verification Test) Engineer Location: San Jose, CA - Onsite Role & Responsibilities:Participates on a project team of engineers involved in the specification, design, development, and test of hardware. Defines the unit and system level test processes and procedures.Performs complex system level unit and integration test. Debug/Mitigate complex system level problems.This engineer will work closely with hardware design engineers, software/diagnostic engineers, an

Senior Hardware Systems Design and Verification EngineerJob Title - Senior Hardware Systems Design and Verification Engineer

NVIDIA CorporationCompany Name - NVIDIA Corporation

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Austin, Texas, USA

Full-time

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to take on, that only we can pursue, and that matter to the world. This is our life's work, to amplify hum

Design Verification EngineerJob Title - Design Verification Engineer

JConnect IncCompany Name - JConnect Inc

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San Jose, California, USA

Full-time

Role: Design Verification Engineers (SoC-5, PCIe-5)Location: Bay AreaSalary: 160-240k (DOE) Free health insurancePTOs: 10 Business days (Including sick leaves) Key Skills: UVM, SoC, PCIe, High Bandwidth memory, Emulation (Zebu or Palladium) Job Description: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from speci

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)Job Title - ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal)

Boeing CompanyCompany Name - Boeing Company

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Tukwila, Washington, USA

Full-time

ASIC and/or FPGA Design & Verification Engineer (Lead, Senior or Principal) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal) to join us as part of our Boeing Electronic Products team at the heart of Boeing's products; ASICs and FPGAs in Tukwila or Kent, WA. From complex digitally beamformed phased arrays for constellation satellite programs to computi