UVM jobs in IN

Design Verification Lead || Onsite Role || Austin, TX / Bay area, CA / Boston, MA

Austin, Texas

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Today

Role: Design Verification Lead Duration: 12+ Months Location: Austin, TX / Bay area, CA / Boston, MA || Onsite Role Job Description-: We are looking for a skilled Design Verification Engineer to ensure the robustness and functionality of our next-generation digital designs. You will be responsible for "breaking" the design by creating sophisticated test environments, identifying critical bugs before tape-out, and ensuring 100% functional coverage. Key Responsibilities Verification Planning: Dev

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Contract

Depends on Experience

Verification Engineer

Hybrid in Durham, North Carolina

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6d ago

Role Summary A mid to senior-level Verification Engineer responsible for developing and executing verification plans for complex ASIC and SoC designs. This role involves designing and implementing verification environments, debugging simulations, and ensuring functional coverage. The position requires a proactive approach to problem-solving and collaboration within cross-functional teams to validate hardware components effectively. Responsibilities Develop and implement UVM testbenches and veri

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Contract, Third Party

Depends on Experience

Design Verification Engineer

San Jose, California

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5d ago

Role: Design Verification Engineer Location: San Jose CA/ Irvine CA / San Diego CA Job Description:Experience: 6 to 15+ years of experience. Job Requirements are as below: Architect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA Develop test plans and coverage metrics from specifications and write block and chip-level tests in C,SV,UVM Debug RTL and Gate simula

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Full-time

Depends on Experience

UVM Digital Verification Engineer

Remote or Cambridge, Massachusetts

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Today

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas

Full-time

USD 75,000.00 - 150,000.00 per year

Sr. Verification Engineer (IC)

Atlanta, Georgia

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3d ago

JSG, Inc. is currently looking for Verification Engineers who will help develop system level UVM test benches for various DDR5 DIMM products, Power Management IC (PMIC) and also CXL 2.0 products. Your contribution would be to lead and work with other global team members in building the infrastructure for system level SoC testing. You will also be responsible to functionally verify the system and IP components, using System Verilog and mixed signal verification techniques. Key Responsibilities:Kn

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Full-time

$190,000 - $210,000

FPGA/Design/Hardware Verification

Mountain View, California

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13d ago

Job Title: FPGA/Design Verification Engineer Location: Mountain View, CA (Onsite)Duration: 12+ MonthsJob Description Strong understanding of FPGA design principles and architectures. Proficiency in System Verilog and UVM verification methodology. Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS). Knowledge of code coverage and functional coverage analysis. Excellent debugging and problem-solving skills. Strong communication and collaboration skills. Requ

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Contract, Third Party

Depends on Experience

ASIC Design Verification Engineer

Remote or Toronto, Ontario

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3d ago

FULLY REMOTE - OPEN TO CANADIAN CITIZENS Key Responsibilities: Develop and maintain SystemVerilog/UVM-based testbenches for complex digital designs.Create and execute detailed test plans covering directed and constrained-random scenarios.Apply Object-Oriented Design principles to build scalable and reusable verification components.Analyze and improve code coverage metrics to ensure thorough verification.Write and maintain scripts (e.g., Python, Perl, Tcl) to automate verification flows and data

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Contract

$70 - $80

GPU Design Verification Engineer

San Jose, California

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3d ago

Job Title: GPU Design Verification Engineer Location: San Jose, CA (Onsite) Duration: 6+ months (Contract) with the possibility of extension Job Description: We are seeking a highly skilled Design Verification Engineer to join our team at Samsung SARC/ACL. The successful candidate will be responsible for verifying the functionality and performance of our cutting-edge GPU designs. Your primary focus will be on developing and executing verification plans, creating testbenches, and debugging compl

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Contract

$80 - $90

Hardware Design Engineer

Redmond, Washington

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12d ago

Hardware Design Engineer 5Job Summary: Talent Software Services is in search of a Hardware Design Engineer for a contract position in Redmond, WA. The opportunity will be for three months with a strong chance for a long-term extension.Position Summary: Become an integral part of a team focused on design verification for complex IPs and subsystems within modern FPGAs. You will be responsible for developing and executing verification test plans for IPs and/or subsystems. Become part of a team focu

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Contract

BASED ON EXPERIENCE

GPU Design Verification Engineer_Austin, TX/SanJose, CA(Onsite)_Only Xoriant W2

Austin, Texas

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10d ago

Xoriant is an equal opportunity employer. No person shall be excluded from consideration for employment because of race, ethnicity, religion, caste, gender, gender identity, sexual orientation, marital status, national origin, age, disability or veteran status. TITLE:- GPU Design verification Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (Will get extend) MODE OF INTERVIEW Onsite RATE As per market only Xoriant W2 (No Vendor employees) JOB DESCRIPTION We are looking for an experienced

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Contract

$70 - $80

Design Verification Engineer (GPU)

San Jose, California

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2d ago

Job Title: "Design Verification Engineer (GPU)" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date I UVM version will place you among

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Contract

Depends on Experience

FPGA Verification Engineer

Owego, New York

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3d ago

Job Title: FPGA Verification Engineer Duration: up to 6 months Contract to Hire (CTH / temp to hire) Location: Owego, NY 13827 Candidates to be onsite in Owego and at their desk or in a lab, but the manager wants to give them the ability to work remotely occasionally Work Schedule: 4/10 1st Shift, Monday to Thursday; 10 hours per day. Pay Rate: $60/hr - $80/hr on W2 [the pay rate may differ depending on your skills, education, experience, and other qualifications] Featured Benefits: Medical

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Contract

60 - 80

FPGA Design/Verification Engineer

Sunnyvale, California

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Today

Location: Sunnyvale, CA Salary: $90.00 USD Hourly - $100.00 USD Hourly Description: Job Title: FPGA Design/Verification Engineer Duration: 6+ Months (Possible Extension) Location: Sunnyvale, CA, Possible: onsite Denver CO. Job Description: The selected candidate will be responsible for ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert. This engineer with have experience: -Verifying FPGA and/or ASIC designs including creating UVM verification environ

Contract

Compensation information provided in the description

IC Verification Engineer

San Jose, California

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Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job duties include: Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.Architect and develop scalable and re-usable testbenches, using the framework of the verification methodologyBuild pseudo-random

Full-time

USD 120,000.00 - 192,000.00 per year

ASIC/FPGA Verification Engineer III

Poway, California

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Today

Job Description Join Our Team as a ASIC/FPGA Verification Engineer where you will work on the development of a sophisticated state-of-the-art avionics product in a world class Integrated Product Development environment. Location: This position does not support teleworking; the selected candidate will be located near our Lockheed Martin Space facility in: Denver CO or Highlands Ranch CO Sunnyvale CA You will work a flexible 9x80 schedule in the office full-time. About Lockheed Martin Space S

Full-time

USD 101,000.00 - 178,135.00 per year

Digital Verification Engineer

Atlanta, Georgia

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Today

Job Description Title: Digital Verification Engineer Location: Atlanta, Georgia Duration: 12 Month Position Details Must Haves: Strong experience with UVM based verification, including testbench development and debug. Hands on experience with high speed serial VIPs (e.g., DisplayPort, HDMI, USB). Demonstrated experience working with ASIC design, verification, or implementation processes to ensure successful development and delivery of application specific integrated circuits. Solid understa

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Contract

Principal Verification Lead Engineer

Austin, Texas

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Principal Verification Lead Engineer Role Overview: The Lead DV Engineer focuses on the execution and technical management of verification projects. You will lead a focused team to ensure comprehensive test coverage and closure for specific CPU cores or processor blocks. Key Responsibilities: Technical Execution: Developing and executing detailed verification plans (vPlans) using Caden

Full-time

Intern Engineer - FPGA Engineering

Bloomington, Minnesota

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Today

Basic Qualifications Candidates should demonstrate a thorough understanding of engineering technology. Engineering Interns must be enrolled in an accredited degree program in Computer Engineering, Systems Engineering, Software Engineering, Electrical Engineering, Mechanical Engineering or other related scientific or technical discipline with a preference for a standing of a sophomore or higher. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibil

Full-time

Compensation information provided in the description

ASIC SoC Verification Engineer

Remote or Austin, Texas

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Today

Grow with us ASIC SOC VERIFICATION ENGINEER, Austin, TX This is not a remote work opportunity. About our opportunity. A long-time telecommunications industry leader, Ericsson is embarking on new endeavors that have led to the opening of a development center in the heart of downtown Austin. Ericsson Austin is rooted in the legacy of Ericsson, while providing a local subculture and vibe that is uniquely Austin. Hardware and software products currently being developed in Austin will be instrumen

Full-time

USD 117,000.00 - 175,000.00 per year

ASIC Verification Engineer

Minneapolis, Minnesota

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for functional verification of next generation ASIC controller to test LPDDR6. Write detailed test plans for IP and SoC module. Collect code and functional coverage for respective desig

Full-time

USD 130,500.00 - 169,500.00 per year

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