Entry level physical design engineer jobs in san jose, ca

Mountain View, California

•

Yesterday

Only Local independent candidates are allowed to apply for this Role. Location: Mountainview, CA Core Technical SkillsASIC Implementation: Full RTL-to-GDSII flow, Block-level Place & Route (PnR), Floorplanning, Power Planning, Placement, and Routing. Timing & Signoff: Clock Tree Synthesis (CTS), Static Timing Analysis (STA), Timing Constraints (SDC), and Timing Closure (Setup/Hold/Transition/Noise). Design Optimization: Power-Performance-Area (PPA) optimization, low-power design techniques, and

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Full-time, Third Party

Depends on Experience

Physical Design Engineer

Mountain View, California

•

Today

Physical Design Engineer (PD / PnR / PPA / Timing Closure) Location: Mountain View CA (Onsite) Job Description We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence for advanced technology nodes. Key Responsibilities Drive block-level physical design implementation from netlist to GDSII. Perform floor planning, power planning, placement, clock tree synthesis (CTS), routing, and physical veri

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Contract

Depends on Experience

Physical design Engineer

San Jose, California

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5d ago

Job Title:Senior Principal Physical Design Engineer (Top-Level Floorplanning & STA) Location: San Jose / Austin Job Type: Onsite Experience : Relevant minimum 7+ years required and senior also fine. Responsibilities Own the full-chip top-level floorplan: die/partition planning, macro and memory placement, and pin/port alignment across block boundaries Define partition abutment, repeating structures, and channel/feedthrough strategy to enable clean block integration Drive top-level PPA optim

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Contract

Depends on Experience

ASIC Physical Design Engineer

San Jose, California

•

Yesterday

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Great base pay, bonus, terrific benefits and exceptional 401k! he MissionStaffRight Associates is recruiting to identify a high-caliber ASICPhysical Design Engineer to spearhead the structural realization of next-generation System-on-Chip (So

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Full-time

170000 - 220000

Physical Design Engineer

San Jose, California

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15d ago

Position: Physical Design Engineer / Staff Engineer Location:San Jose CA Contract More than 12 months Relocation consultants are also considerable.. Job Responsibilities: We are seeking experienced Physical Design Engineers with expertise in top-level signoff for complex SoCs on advanced nodes (7nm/5nm/3nm). Candidates should have multiple full-cycle tapeouts and strong experience in signoff-to-tapeout closure. Key Responsibilities: Drive full-chip/top-level signoff activities Collaborate with

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Contract

Depends on Experience

Physical Design Engineer (PnR / PPA / Timing Closure) (Only W2))

Mountain View, California

•

Today

Job Description We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence for advanced technology nodes. Key Responsibilities Drive block-level physical design implementation from netlist to GDSII. Perform floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and physical verification. Optimize designs for Power, Performance, and Area (PPA) targets. Achieve timing closure

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Full-time

140,000 - 150,000

Senior Staff GPU Physical Design Engineer

Remote

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Today

Job Description Title: Senior Staff GPU Physical Design Engineer Location: Austin, TX or San Jose, CA. onsite strongly preferred Need: GPU or high-performance SoC experience. Advanced node (?5nm). Full block ownership Position Summary We are seeking a Senior Staff GPU Physical Design Engineer for our client to work on the physical implementation of high-performance GPU and system-level IP, driving execution across synthesis, place-and-route, timing closure, and signoff for their advanced tech

Contract

SoC Physical Design Engineer, Electrical Analysis

San Jose, California

•

Today

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our pr

Full-time

ASIC / SoC RTL Design Engineer

San Jose, California

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Today

SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Lead advanced CMOS SoC design using ARM, PCIe, DDR, and Ethernet. Responsibilities: Architecture definition and micro-specs RTL coding, verification, and debug Synthesis, timing closure, and bring-up Requirements: ASIC design flow experience Expert RTL coding/debugging Dexian stands at the forefront of Talent + Technology solutions with a presence spanning more than 70 locations worldwide and a team exceeding 10,

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Contract

$60 - $62.50 per hour

Design Verification Engineer - Ethernet

Santa Clara, California

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20d ago

Design Verification Engineer Overview Upscale AI is developing next-generation Ethernet networking infrastructure optimized for large-scale AI and GPU cluster environments. We are seeking experienced Design Verification Engineers with strong networking and ASIC verification backgrounds to help validate high-performance networking silicon and AI fabric technologies. ResponsibilitiesDevelop and execute verification plans for networking ASICs and SoC designsBuild and maintain SystemVerilog/UVM-base

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Full-time

USD180000 - USD300000 per annum, Benefits: $180k-$300k Annual Salary

Junior PCB Design Engineer (DesignSpark) | Remote

Remote

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12d ago

Position: Junior PCB Design Engineer (DesignSpark) Type: Contract Compensation: $20 - $110/hour Location: Remote Commitment: 10-40 hrs/week Role ResponsibilitiesReview and evaluate PCB designs using DesignSpark software to ensure accuracy and compliance with specifications.Provide detailed feedback and annotations on PCB schematics and layouts based on industry standards.Contribute technical insights to develop comprehensive data sets for training AI models.Collaborate with AI engineers and tec

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Contract, Third Party

$20 - $110

Design Engineer 4

Newark, California

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15d ago

Job Title: Engineering & IT - Design Engineer 4 Start/End Dates: 25/05/2026 - 31/12/2026 Candidate Location Requirements: Newark, California, Engineer, Exterior Trim We are currently seeking an Exterior Trim Engineer. This position requires a responsibility for designing and developing parts of the exterior systems of a world class vehicle in terms of both styling and function. Our ideal candidate exhibits a can-do attitude and approaches his or her work with vigor and determination. Candidates

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Contract, Third Party

Depends on Experience

Product Design Engineer V || Cupertino, CA (Onsite)

Cupertino, California

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Yesterday

Our client, a leading global consumer electronics and technology company, is looking to hire a Contract Product Design FEA Engineer in Cupertino, CA. Pay Rate Range:$90 to $110/hr on w2, depending on experience Responsibilities: We are seeking a Contract Product Design FEA Engineer to play a critical role in predictive engineering and product development. In this position, you will leverage your expertise in mechanics, materials, and numerical simulation methods to support the structural desig

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Contract, Third Party

$111.94 - $111.94

Product Design Engineer (III)

Mountain View, California

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Today

Location: Mountain View, CA Salary: $91.00 USD Hourly - $100.00 USD Hourly Description: Our client is currently seeking a Product Design Engineer () Below is a summary of the position: Job Title : Product Design Engineer () Location : Mountain View, CA Worksite : Hybrid Duration : 6+ months Job Description: Minimum role qualifications requirement: - years of experience designing mechanical components such as plastic or metal parts, mechanical assemblies, printed circuit boards, or flexes. - y

Contract

Compensation information provided in the description

Associate Mechanical Engineer - Federal Engineering and Design Team

Remote or Arizona

•

Today

Company Description We are Olsson. We engineer and design solutions that improve the world around us. As a company, we promise to always be responsive, transparent, and focused on results - for our people, our clients, and our company. We're a people-centric firm, so it's no surprise our greatest asset is our people. The impact this creates is an environment that encourages our people to grow and be creative with their talents. This approach builds a culture that is uniquely Olsson. It allows

Full-time

AI Infrastructure DC Design Engineer I

Remote or California

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Today

AI Infrastructure Datacenter Design Engineer - Level 1 (Entry / Junior Engineer) Position Summary AI Infrastructure Datacenter Design Level 1 is responsible for supporting simple data hall infrastructure designs and drafting activities under the guidance of senior engineers. This role focuses on developing foundational technical skills, learning design standards, and supporting project execution for low-complexity environments. Key Responsibilities Create and update simple AutoCAD drawings an

Full-time

USD 44,232.00 - 69,840.00 per year

Electrical Engineer - Senior Level - Substation Physical Design Focus (Hybrid/Remote)

Remote or Minneapolis, Minnesota

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Today

The role - what you'll do Barr is seeking a substation physical design engineer to join our electrical engineering team. In this hybrid role, you will support the Engineering and Design business unit by interfacing with clients to support the development of substation physical design deliverables for utility upgrades, including greenfield/brownfield substations, wind facilities, and developer interconnection facilities. You will be responsible for understanding client and internal standards and

Full-time

USD 120,000.00 - 145,000.00 per year

Senior Engineer, Analog Design Engineering

San Jose, California

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Today

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI

Full-time

USD 159,890.00 - 192,050.00 per year

Senior Engineer, GPU RTL Design - Pixel Pipe

San Jose, California

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Today

Position Summary Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the wo

Full-time

USD 139,000.00 - 208,400.00 per year

FPGA Silicon Design Engineer

San Jose, California

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Today

Job Details: Job Description: About Altera At Altera , our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster,

Full-time

USD 149,100.00 - 215,925.00 per year

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Entry level physical design engineer jobs in San Jose, CA, USA