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Today

Job Description: Senior Clock Domain Crossing (CDC) Contractor to support our engineering team. This is a critical, short-term engagement focused on maintaining design integrity during a transition period. The ideal candidate will serve as a subject matter expert in CDC analysis and ASIC Design-for-Test (DFT) constraints.leading the CDC/RDC (Clock Domain Crossing / Reset Domain Crossing) methodology in silicon one chips:Design & implement robust and reusable RTL with CDC/RDC considerationsSpec c

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Contract

Depends on Experience

DFT Engineer

San Jose, California

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26d ago

Role :- Senior ASIC DFT CDC Constraints Eng Location :- San Jose, CA/Milpitas, CA (Remote) Type :- */W2 This is a highly specialised role at the intersection of Design for Test (DFT) architecture and clock domain crossing (CDC) constraint engineering. The successful candidate will own the SDC/SSTA constraint strategy that governs both functional timing closure and DFT scan-mode operation across a complex multi-clock SoC. You will work daily at the boundary where CDC violations manifest as sca

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Full-time, Third Party

Depends on Experience

CPU CDC/RDC/STA Engineer

Beaverton, Oregon

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Today

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our pr

Full-time

CPU CDC/STA Engineer

Santa Clara, California

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Today

Full-time

Staff SoC DFT Engineer, HBM

Richardson, Texas

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Today

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. You will join an inclusive, innovation-driven team focused on building technologies that power virtual reality, neural networks, and next-generation computing. In this role, you will own design for

Full-time

Analog Mixed Signal IP Integration Engineer

San Francisco, California

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Today

At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and especially motivated Analog Mixed Signal IP Integration Engineer! As a member of our dynamic group, you will have the rare and great opportunity to work on upcoming products that will delight and encourage millions of Apple's customers every day! In this highly visible role,

Full-time

Graphics FE Integration Engineer

Austin, Texas

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Today

Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient GPU! You'll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you'll be crafting and building the technology that fuels Apple's devices. Together, we enable our customers to do all the things they love with their device

Full-time

RTL Design Engineer

Remote

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Today

RTL Design Engineer Key Responsibilities Own micro-architecture definition from high-level functional specificationsDevelop and implement RTL for complex digital blocksDrive digital block control and IP integrationParticipate in subsystem-level architecture alignmentSupport design sign-off activities (CDC, RDC, lint, synthesis readiness)Collaborate closely with DV for closure and debugRequired Qualifications Strong expertise in RTL design (SystemVerilog/Verilog)Experience defining micro-architec

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Contract

Depends on Experience

MTS Digital Engineering

Morrisville, North Carolina

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Today

Overview As a New College Graduate Design Engineer, the full-time position candidate will be responsible for specifying, architecting, implementing, and simulating RTL components. The individual will work closely with specification developers, digital & analog designers, and physical design teams to realize efficient and highest performance designs. The position is for DDR5 and DDR6 enterprise-class memory interface products to grow the Memory Interface Chip Business Unit. Rambus offers a flex

Full-time

USD 58,000.00 - 108,000.00 per year

Integration Engineer

Santa Clara, California

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Today

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies

Full-time

Applications Engineering, Sr Staff Engineer- 16949

Sunnyvale, California

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Today

Descriptions & Requirements Job Description and Requirements We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You A

Full-time

Sr. Principal Software Engineer

Austin, Texas

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems is looking for a highly motivated hardware engineer to work with the Modus R&D engineering team in the Design-For-Test (DFT) IP business unit. As a member of the DFT R&D team, you will design and implement advanced Design-for-Test (DFT) hardware, test fabrics, and on-chip test networks used in next-generation SoCs. You will contribute to the hardware and software

Full-time

USD 196,000.00 - 364,000.00 per year

Firmware Engineer

Huntsville, Alabama

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Today

Torch Technologies Thank you for your interest in employment with Torch Technologies. We are a 100% employee-owned, Certified Great Place To Work and named Best Places to Work in Huntsville/Madison County, headquartered in Huntsville, AL. Our team provides superior research, development, and engineering services to the Federal Government and Department of War. As one of the nation's top 100 defense companies, the services we provide directly support the men and women who serve our country. Our

Full-time

Principal SoC RTL Engineer

Austin, Texas

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Today

Company Overview Ambiq is on a mission to enable intelligence everywhere - powering the AI edge revolution with the world's lowest-power semiconductor solutions. Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. Our cross-functional tea

Full-time

Methodology Engineer - Static RTL Verification

San Jose, California

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Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 101,500.00 per year

Staff Engineer, Digital ASIC Design (CONTRACT)

Burlington, Massachusetts

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Today

Job Description The role of the Staff Digital ASIC Designer offers the opportunity to work within the heart of the product development team and founders and to own the core of what will set Butterfly Network apart. This individual will design, implement, and verify digital signal processing, high speed interface, and system-on-a-chip logic for a suite of next-generation products. As part of our team, your core responsibilities will be: Develop low-power RTL for large SoCs in an advanced node.

Full-time

Principal Engineer, SOC IP Systems & Lifecycle Management

San Jose, California

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Today

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

Full-time

USD 175,000.00 per year

Staff Engineer, Digital Verification

California

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Today

Staff Engineer, Digital Verification Company Description Butterfly Network, Inc. (NYSE: BFLY) is driving a digital revolution in ultrasound imaging and sensing with its proprietary Ultrasound-on-Chip semiconductor technology and software solutions. Butterfly first proved its technology in the point-of-care ultrasound market - commercializing the world's first single-probe, whole-body portable ultrasound device, which is now on its best-selling, third-generation: Butterfly iQ3 . The Company com

Full-time

Staff Engineer, Digital Verification

Burlington, Massachusetts

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Today

Full-time

Sr. EDA Flow Engineer

Santa Clara, California

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Today

Description Position Overview: Work closely with design teams and CAD/EDA stakeholders to identify workflow bottlenecks across the chip development lifecycle-such as DRC/CDC/STA debug, regression triage, PPA convergence, and ECO iteration. This role focuses on building scalable data pipelines and models, and integrating AI-driven solutions into production CAD and verification flows. Responsibilities: Identify and prioritize high-impact opportunities to apply AI/ML to chip design and verifica

Full-time

USD 110,000.00 - 145,000.00 per year

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