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San Jose, California

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Today

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Base pay, bonus, outstanding retirement programs! The MissionStaffRight Associates has been retained to lead an exclusive search for a Senior ASIC Design Architect to spearhead the development of custom, high-performance silicon for next-gene

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Full-time

180000 - 230000

Senior ASIC Design Engineer - Clocks IP

Santa Clara, California

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Today

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life's work, to amplify human

Full-time

USD 136,000.00 - 218,500.00 per year

ASIC Physical Design Engineer

San Jose, California

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Today

Candidates must be currently authorized to work in the United States on a full-time, permanent basis. StaffRight Associates and our clients do not provide visa sponsorship for this position. PLEASE DO NOT APPLY IF YOU DO NOT MEET THESE ABOVE QUALIFICATIONS Great base pay, bonus, terrific benefits and exceptional 401k! he MissionStaffRight Associates is recruiting to identify a high-caliber ASICPhysical Design Engineer to spearhead the structural realization of next-generation System-on-Chip (So

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Full-time

170000 - 220000

Senior Firmware Engineer - high-speed interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

•

Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 111,070.00 - 166,400.00 per year

Principal Firmware Engineer - high-speed optical interconnects /custom silicon/ASIC design / microcontroller architectures /

Santa Clara, California

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Today

Full-time

USD 154,680.00 - 231,700.00 per year

Senior ASIC/RTL Modem Engineer

Santa Clara, California

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Today

Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: This individual independently plans, performs the moderately-defined responsibility for the wireless Modem design, verification and RTL implementation. Works with Hardware, Verification and Systems teams for bit-exacting testing of wireless modems for the delivery of cutting edge mobile products across established wireless standard/protocol in the mobile, networking, computing a

Full-time

USD 171,138.00 - 190,100.00 per year

Senior ASIC DV Engineer

San Jose, California

•

Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: You will contribute to the development of complex SOCs targeted towards Touch Controllers/Wireless Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: Architecting block and full-chip verification e

Full-time

USD 141,300.00 - 226,000.00 per year

Lead ASIC DFT Engineer

San Jose, California

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8d ago

Role: Lead ASIC DFT Engineer Location: San Jose, CA (Remote, PST time zone preferred) Work Setup: Remote, PST time zone preferred Experience Required: 10+ years of hands-on experience in ASIC Design-for-Test (DFT) DFT Architecture definition. Must Full chip / Sub system level DFT activities Must Scan & compression (EDT) implementation Must LBIST implementation and verification any BIST exp is Must Coverage improvements (Spyglass work) Must ATPG Good to Have Role Summar

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Full-time, Contract, Third Party

Depends on Experience

Sr. Staff ASIC Verification Engineer

Palo Alto, California

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Today

About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we constantly challenge what's possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it

Full-time

USD 237,000.00 - 296,000.00 per year

Senior ASIC Engineer

Santa Clara, California

•

Today

Our Mission At Palo Alto Networks , we're united by a shared mission-to protect our digital way of life. We thrive at the intersection of innovation and impact, solving real-world problems with cutting-edge technology and bold thinking. Here, everyone has a voice, and every idea counts. If you're ready to do the most meaningful work of your career alongside people who are just as passionate as you are, you're in the right place. Who We Are In order to be the cybersecurity partner of choice, w

Full-time

USD 173,600.00 - 280,700.00 per year

Senior Hardware System Design Engineer

San Jose, California

•

Today

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom's Core Switching Group (CSG) is at the forefront of developing highly integrated (SoC) devices for data center and cloud computing markets. Our team is dedicated to designing reference and production boards using cutting-edge technology We ar

Full-time

USD 120,000.00 - 192,000.00 per year

PDK and CAD Support Engineer - Integrated Circuit Design (ASIC and MMIC)

Remote or New Hampshire

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13d ago

Date Posted: 2026-03-12 Country: United States of America Location: US-NH-REMOTE Position Role Type: Remote U.S. Citizen, U.S. Person, or Immigration Status Requirements: Security Clearance Type: None/Not Required Security Clearance Status: Not Required At RTX, the foundation of everything we do is rooted in our values and a higher calling - to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering

Full-time

USD 107,500.00 per year

Sr. Hardware Design Engineer - Electrical, Satellite Payload (Starlink)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. HARDWARE DESIGN ENGINEER - ELECTRICAL, SATELLITE PAYLOAD (STARLINK) The Starlink team designs, builds, and operates the world's most advanced communication network. Comprised of over ten thousand satellites in low

Full-time

USD 145,000.00 - 205,000.00 per year

Sr. Electrical Design Engineer, Satellite Payload (Starlink)

Sunnyvale, California

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Today

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. ELECTRICAL DESIGN ENGINEER, SATELLITE PAYLOAD (STARLINK) The Starlink team designs, builds, and operates the world's most advanced communication network. Comprised of over ten thousand satellites in low Earth orbi

Full-time

USD 145,000.00 - 205,000.00 per year

Senior Staff Engineer, Design Verification

San Jose, California

•

Today

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o

Full-time

USD 189,000.00 - 301,000.00 per year

FPGA Design Verification Engineer

Mountain View, California

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17d ago

FPGA Design Verification EngineerIntroduction:The FPGA Design Verification Engineer will play a crucial role in the team, leading FPGA design verification activities for advanced wireless communication systems. They will be responsible for developing, implementing, and validating DSP algorithms and functional blocks, contributing to phased array and beamforming projects, and ensuring high performance and reliability in FPGA-based systems. Responsibilities:Extensive experience in FPGA design and

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Third Party, Contract

70 - 90

Senior Staff Engineer, SOC Architect and Hardware Engineering

San Jose, California

•

Today

Full-time

USD 189,000.00 - 301,000.00 per year

Senior Architect, Intelligent Solutions Engineering

Foster City, California

•

Today

At Gilead, we're creating a healthier world for all people. For more than 35 years, we've tackled diseases such as HIV, viral hepatitis, COVID-19 and cancer - working relentlessly to develop therapies that help improve lives and to ensure access to these therapies across the globe. We continue to fight against the world's biggest health challenges, and our mission requires collaboration, determination and a relentless drive to make a difference. Every member of Gilead's team plays a critical ro

Full-time

USD 169,320.00 - 219,120.00 per year

ASIC Verification Engineer

Santa Clara, California

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4d ago

Position:ASIC Verification Location:Santa Clara CA & Austin, TX Contract/ Fulltime Job Responsibilities: Architect and develop verification environment, testbench components, and reference models for designs at block and system level.Develop a comprehensive test plan and implement test cases.Verify design in block and chip-level environments using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification.Perform RTL code coverage, assert

Easy Apply

Full-time

Depends on Experience

Design Verification Engineer IV

San Jose, California

•

Today

Position:Design Verification Engineer IV Job Description:Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to multi-million gate product tapeout & for Test design and development * Develop complex self checking test benches with constraint random stimulus generation. * Architect SoC test FW and create test plan documentation to cover ASIC features. * Develop and debug SoC ASIC platfor

Full-time

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