rtl design Jobs

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RTL Design EngineerJob Title - RTL Design Engineer

JobotCompany Name - Jobot

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Suwanee, Georgia, USA

Full-time

Leading semiconductor manufacturer with competitive compensation, generous bonus, and stock options! Also offering relocation bonus and/or be willing to relocate to Atlanta, GA This Jobot Job is hosted by: Michael Ramsey Are you a fit? Easy Apply now by clicking the "Apply Now" button and sending us your resume. Salary: $125,000 - $200,000 per year A bit about us: Leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center mark

RTL Design EngineerJob Title - RTL Design Engineer

JobotCompany Name - Jobot

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Los Angeles, California, USA

Full-time

RTL Design EngineerJob Title - RTL Design Engineer

JobotCompany Name - Jobot

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Atlanta, Georgia, USA

Full-time

RTL Design EngineerJob Title - RTL Design Engineer

JobotCompany Name - Jobot

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Seattle, Washington, USA

Full-time

RTL Design EngineerJob Title - RTL Design Engineer

JobotCompany Name - Jobot

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Dallas, Texas, USA

Full-time

Memory PHY RTL design EngineerJob Title - Memory PHY RTL design Engineer

AdientOne LLCCompany Name - AdientOne LLC

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Massachusetts, USA

Contract

Role: Memory PHY RTL design Engineer Location: Boxborough MA 01719 | Hybrid 3 days onsite per week Duration: 12+ months THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware development of high-speed LPDDR, DDR IPs. Be a part of the definition, design and development phase of industry-leading Memory PHYs and interface IP. This opportunity includes creation of new IO designs as well as working on multiple designs and enhancing methodologie

RTL Design EngineerJob Title - RTL Design Engineer

Yoh - A Day & Zimmerman CompanyCompany Name - Yoh - A Day & Zimmerman Company

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Santa Clara, California, USA

Full-time

RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong background in supporting RISC-V houses. The primary technology will be focused around SOCs that are built around ML Accelerators. This person should have a solid background in RTL Design and also have an understanding of verification flows. This person should be a strong engineer and be able to come in and provide solid and consistent support with minimal hand holding or guidance. Required 7+ Years of RTL Design experi

Memory PHY RTL design Engineer at Boxborough, MAJob Title - Memory PHY RTL design Engineer at Boxborough, MA

Infobahn Softworld Inc.Company Name - Infobahn Softworld Inc.

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Boxborough, Massachusetts, USA

Contract, Third Party

Role Title: Memory PHY RTL Design Engineer Location: Boxborough, MA (Hybrid - 3 days a week) Duration: 12+ months contract THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware development of high-speed LPDDR, DDR IPs. Be a part of the definition, design and development phase of industry-leading Memory PHYs and interface IP. This opportunity includes creation of new IO designs as well as working on multiple designs and enhancing method

RTL Power/ Design EngineerJob Title - RTL Power/ Design Engineer

AMD (Advanced Micro Devices)Company Name - AMD (Advanced Micro Devices)

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Austin, Texas, USA

Full-time

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellenc

RTL Power/ Design Engineer LeadJob Title - RTL Power/ Design Engineer Lead

AMD (Advanced Micro Devices)Company Name - AMD (Advanced Micro Devices)

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Austin, Texas, USA

Full-time

Senior ASIC Design EngineerJob Title - Senior ASIC Design Engineer

Pro IntegrateCompany Name - Pro Integrate

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New York, USA

Third Party

Hi, Hope you are doing good Position: Senior ASIC Design Engineer Location: San Jose, CA (Complete onsite) locals highly preferred Duration: 6-12 months Experience: 8+ years (Relevant) A bachelor's degree in electrical or computer engineering, accompanied by a minimum of 10 years of experience in ASIC or a related field, or a master's degree in electrical or computer engineering with at least 8 years of experience in ASIC or a related discipline. A comprehensive understanding of FPGA design,

System IP Design Verification EngineerJob Title - System IP Design Verification Engineer

BayOne SolutionsCompany Name - BayOne Solutions

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Austin, Texas, USA

Contract

Job Title: System IP Design Verification Engineer Duration: 6 Months Location: Austin, TX, USA / San Jose, CA (Hybrid) Note: GLS verification experience, preferably on SoC designs." Good hands-on experience in debugging GLS. Must Have: Minimum 10 years of experience in verification of DV role along withHands on UVM, system Verilog and TestbenchGate Level simulation Primary skillsRTL designMajority of work will be on Gate level simulationThis will be a ands on roleNice to have: LPDDR memoryco

FPGA Design EngineerJob Title - FPGA Design Engineer

T2S SolutionsCompany Name - T2S Solutions

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Poway, California, USA

Full-time

Summary Blue Marble Communications is currently seeking to hire an FPGA Design Engineer to implement, test, and document RTL running on BMC's spaceborne radio frequency, networking, computing, and optical communications products. This individual will also help architect FPGA modules and designs on the latest generations of Xilinx FPGA/SoC devices. The candidate must be a self-starter with good time management skills, a great attitude, and very strong attention to detail. Responsibilities Develo

Principal Digital Design EngineerJob Title - Principal Digital Design Engineer

OSI Engineering, Inc.Company Name - OSI Engineering, Inc.

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San Jose, California, USA

Full-time

Principal Digital Design Engineer A premier chip and silicon IP provider focused on accelerating and securing data is seeking an exceptional Principal Digital Design Engineer to join its Memory Interface Chip (MIC) team in San Jose, CA. This is an exciting opportunity to work alongside some of the industry s most innovative engineers on cutting-edge technology that drives faster and more secure data solutions. In this full-time role, the Principal Digital Design Engineer will report directly to

Design Verification Engineer || Mountain View, CA (Onsite)Job Title - Design Verification Engineer || Mountain View, CA (Onsite)

E-Solutions, Inc.Company Name - E-Solutions, Inc.

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Mountain View, California, USA

Full-time

Job Role- Design Verification Engineer Location- Mountain View, CA (Onsite) Job Descriptions- Key Responsibilities: Strong understanding of SV and UVM and good debugging skills. Understanding of AMBA protocols. Understand design specs and develop test plans based on functional and architectural requirements Build UVM/System Verilog-based verification environments for IP/subsystem/SoC level testing Develop directed and random testcases, perform coverage analysis, and close functional/code cover

Principal Full Stack EngineerJob Title - Principal Full Stack Engineer

CAYS IncCompany Name - CAYS Inc

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Atlanta, Georgia, USA

Contract

React (SME Level) Node JavaScript/TypeScript/ Micro Front End Architecture Responsive Application Design Jest, RTL, or similar test libraries Additionally very strong IdP skills related to Ping for authentication (PingOne PingID) Migrating from Gigya to Ping in first quarter 2026 Good to have - Knowledge of AWS Services Job Duties & Responsibilities Development and implementation of complex web applications, focusing on high-performance solutions using React and micro-frontend architectures. Ev

RTL Engineer: Integrate RISC-V Core to SoCJob Title - RTL Engineer: Integrate RISC-V Core to SoC

Intelliswift Software IncCompany Name - Intelliswift Software Inc

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Santa Clara, California, USA

Contract

Job Title: RTL Engineer: Integrate RISC-V Core to SoC Location(s): Santa Clara, CA - Onsite Must Have skills: 5+ years of experience in RTL design, SoC integration, or related areas.Strong hands-on experience with hardware description languages (Verilog, SystemVerilog, VHDL), EDA tools, and simulators (VCS, NC, Verilator).Deep understanding of SoC design, integration, and high-performance interfaces (e.g., AXI, TileLink, PCIe, Ethernet).Proven ability to debug and optimize designs for functiona

Design Verification EngineerJob Title - Design Verification Engineer

BayOne SolutionsCompany Name - BayOne Solutions

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San Jose, California, USA

Contract

Job Title - Design Verification Engineer (GPU) Duration 6+ Months Location: San Jose, CA Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date I UVM version will place you among the elite within our prof

LLM Engineer AI-Assisted RTL IntegrationJob Title - LLM Engineer AI-Assisted RTL Integration

TESTINGXPERTS, INC. DBA DAMCOSOFTCompany Name - TESTINGXPERTS, INC. DBA DAMCOSOFT

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Third Party

Role :: LLM Engineer AI-Assisted RTL Integration Location: Bay Area, CA (Onsite Only) Industry: Semiconductor / AI / EDA Job Overview: LLM Engineer with expertise in prompt engineering, dataset creation, fine-tuning, and deployment of on-premises open-source LLMs for RTL (Register Transfer Level) design. The ideal candidate will work closely with RTL domain experts to develop and optimize AI-assisted RTL integration workflows. The role involves prompt engineering, output validation and re-pr

GPU RTL/FW EngineerJob Title - GPU RTL/FW Engineer

Mastech DigitalCompany Name - Mastech Digital

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San Jose, California, USA

Contract

Mastech Digital provides digital and mainstream technology staff as well as Digital Transformation Services for all American Corporations. We are currently seeking a GPU RTL/FW Engineer for our client in the Electronics domain. We value our professionals, providing comprehensive benefits and the opportunity for growth. This is a Contract position, and the client is looking for someone to start immediately. Duration: 6+ Months Contract Location: San Jose, CA; San Diego, CA; Austin, TX - Hybrid Sa