140 results (9 new)
San Jose, California
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Today
Hi, Role : Design Verification Engineer Location: San Jose, CA - Onsite Hands-on experience with industry-standard verification methodologies like System Verilog/UVM and understand how to build scalable, reusable testbenches. Experience handling vendors and integration of IP/VIP sUVM/System Verilog Thanks and Regards, Praveenkumar
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Third Party, Contract
Depends on Experience
Sunnyvale, California
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Today
Job Description Onsite 3 days in Sunnyvale, CA Job Description About the role: Design Verification engineer for wearables silicon accelerator IPs - testbench development, coverage-driven verification, RTL debug, and power/performance measurement. Responsibilities Develop and execute verification plans for RTL blocks/IPs across the subsystem. Build and maintain SystemVerilog/UVM testbenches; write directed and constrained-random tests. Drive functional coverage and assertion (SVA) closure; run a
Contract
USD 80.00 - 86.00 per hour
San Jose, California
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Today
Verification Lead / Principal Verification Engineer - PCIe Gen5/Gen6 Location: San Jose, CA Experience: 10+ Years Job Type: Contract / Long-Term Job Summary We are seeking a Verification Lead / Principal Verification Engineer with strong hands-on experience in PCIe Gen5/Gen6 verification to lead end-to-end verification of PCIe Controller and Subsystem IP. The ideal candidate will have deep expertise in PCIe protocol, UVM, SystemVerilog, LTSSM, PIPE, PHY/SerDes, assertions, coverage closure,
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Full-time, Part-time, Contract, Third Party
San Jose, California
•
Today
Role : Verification Lead Memory Controller (CHI-G / DFI) Location : San Jose, CA (Onsite) | Lead Level | Exp : 10+ Years We are looking for a Verification Lead with strong hands-on experience in Memory Controller Design Verification. Key Skills: 10+ years Design Verification experience 3+ years in Verification Lead/Management DDR4/DDR5/LPDDR Memory Controller verification ARM CHI / CHI-G protocol verification DFI interface & PHY verification Expert SystemVerilog / UVM AXI4 / ACE / AHB /
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Contract
Depends on Experience
San Jose, California
•
Today
Hi, Hope you are doing well. We do have below position. If interested, kindly repond. Principal/Lead Design Engineer Memory Controller-(CHI-G / DFI) Location: San JoseDuration would be 6 months to start and can be extended to 18 months. OnsiteDepartment: Hardware / SoC DesignLevel: Senior (8+ years) Role Summary We are looking for a Principal Design Engineer to lead RTL development and architecture updates for our Memory Controller subsystem, with deep expertise in the ARM CHI-G (Coherent Hub I
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Contract, Third Party
70+
Sunnyvale, California
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10d ago
Payrate: $82.00- $85.00/hr. Summary Design Verification engineer for wearables silicon accelerator IPs testbench development, coverage-driven verification, RTL debug, and power/performance measurement. ResponsibilitiesDevelop and execute verification plans for RTL blocks/IPs across the subsystem.Build and maintain System Verilog/UVM test benches; write directed and constrained-random tests.Drive functional coverage and assertion (SVA) closure; run and triage regressions.Perform power/performan
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Third Party, Contract
$82 - $85
San Jose, California
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Today
We have an open Emulation Engineer position in San Jose, USA. Senior Emulation Engineer Location: San Jose, CA Exp: 10+ years Key Skills: Veloce, Palladium, or ZeBu, PCIe and UCIe and memory technologies such as LPDDR and HBM Set up and maintain Siemens Veloce emulation and prototyping platforms Adapt SoC designs for Emulation and Prototyping Develop and debug emulation testbenches and system-level environments Support pre-silicon validation, power/performance analysis, and early software br
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Third Party, Contract
Depends on Experience
San Jose, California
•
Today
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a skilled engineer to join our Power Analysis team, focused on developing, debugging, and deploying Signoff power analysis flows at customer environments. Key Responsibilities Closely work with R&D to develop and maintain Signoff power analysis flows including integration with synthesis and PnR stages Reproduce, debug, and resolve customer-reported issues in power an
Full-time
USD 114,800.00 - 213,200.00 per year
San Jose, California
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Today
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t
Full-time
USD 160,000.00 - 200,000.00 per year
Santa Clara, California
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Today
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a CPU Emulation Engineer, you will work as part of CPU verification team to deliver emulation-based solutions for CPU team. You will work closely with all disciplines of CPU team to help verify and validate high performance CPUs. Role and Responsibilities Work closely with CPU RTL, performance, verification and SW teams to deliver emulation-based solutions.Architect and de
Full-time
USD 167,100.00 - 250,700.00 per year
Cupertino, California
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Today
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practice
Full-time
San Jose, California
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Today
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Joi
Full-time
USD 104,000.00 per year
Santa Clara, California
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Today
Benefits: Day-1 Onsite Competitive salary Opportunity for advancement DFT Engineer (Design for Test) Location: Santa Clara, CA (Onsite) Employment Type: Long-Term Contract Interview Process: Virtual Interviews Compensation: Based on Experience (DOE) Engagement: ANY Preference: Local candidates or those able to work onsite We are seeking an experienced DFT Engineer to join a high-performing ASIC/SoC engineering team. In this role, you will be responsible for designing and implementing De
Full-time
Compensation information provided in the description
Santa Clara, California
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Today
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: We are seeking a highly skilled and versatile engineer who thrives at the intersection of RTL design and CAD automation. This role is ideal for someone who understands RTL workflows deeply and can build scalable automation solutions to streamline design and debug processes. You'll work closely with CPU design teams to support RTL development, triage issues, and enhance prod
Full-time
USD 198,700.00 - 298,100.00 per year
San Jose, California
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Today
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Seeking a highly motivated engineer who can drive improvement to Cadence's synthesis and place & route products from a design perspective. The position provides an excellent opportunity to work closely with the R&D team to define the roadmap of the products. Job responsibilities: Perform Product Engineering work for Genus Synthesis Solution (Genus), a logic synthesis software used for
Full-time
USD 136,500.00 - 253,500.00 per year
Santa Clara, California
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Today
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo
Full-time
USD 178,500.00 per year
San Jose, California
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Today
This opening is part of Infineon's Graduate program. The Graduate Program gives new Graduates the opportunity to gain enriching and diverse experiences and work side by side with experienced leaders to power your career. In your new role you will: Design and implement digital circuits for automotive electronic applicationDevelop digital architectures that meet automotive industry standards for reliability, safety, and performance.Write and optimize low power Register Transfer Level (RTL) code,
Full-time
San Jose, California
•
Today
Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries o
Full-time
USD 138,000.00 - 206,000.00 per year
Santa Clara, California
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Today
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies
Full-time
San Jose, California
•
Today
As a Senior Engineer Digital IC Design, you will be responsible for developing digital architectures that meet the automotive industry's standards for reliability, safety, and performance. If interested, apply today! Job Description In your new role you will: Design and implement digital circuits for automotive electronic applicationsWrite and optimize low power Register Transfer Level (RTL) code, implement and simulate digital designs to ensure functionality and performance requirements are me
Full-time
USD 126,720.00 per year
