Upf jobs in remote

Remote

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4d ago

Required: Understanding of real-time payments, ACH, RTGS, SEPA, SWIFT Familiarity with ISO 20022 messaging standards Knowledge of the CI-HUB architecture and product (installation, configuration, operation) Knowledge of UPF (installation, configuration, operation) Knowledge of the CI-HUB product lifecycle. Cloud & DevOps: Experience with cloud-native platforms (AWS, Azure, Google Cloud Platform) Microservices architecture and containerization (Docker, Kubernetes) Integration & APIs: RESTful API

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Contract

60 - 65

Design Engineer

Sunnyvale, California

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10d ago

Payrate: $82.00- $85.00/hr. Summary Design Verification engineer for wearables silicon accelerator IPs testbench development, coverage-driven verification, RTL debug, and power/performance measurement. ResponsibilitiesDevelop and execute verification plans for RTL blocks/IPs across the subsystem.Build and maintain System Verilog/UVM test benches; write directed and constrained-random tests.Drive functional coverage and assertion (SVA) closure; run and triage regressions.Perform power/performan

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Third Party, Contract

$82 - $85

Network Engineer - – Cisco Enhanced Packet Core (EPC)

Bellevue, Washington

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19d ago

Hands-on experience with Cisco Enhanced Packet Core products and 5G call flow troubleshooting. Ability to develop, execute, and refine network test plans, and document results in formal test reports. Experience designing and implementing lab equipment upgrades and new feature rollouts. Ability to build migration guides and support lab-to-production migration activity, including Production First Office Application (FOA) nights. Working knowledge of network design principles resiliency, self-reco

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Contract, Third Party

Depends on Experience

UPF Engineering Process Commissioning Specialist

Oak Ridge, Tennessee

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Today

Boston Government Services (BGS) is seeking a Uranium Processing Facility (UPF) Engineering Process Commissioning Specialist to support our clients at the Y12 National Security Complex in Oak Ridge, Tennessee. BGS is an engineering, technology, and security firm helping to advance missions of national importance for government programs, national laboratories, national security facilities, nuclear operations, and complex projects. We support clients at every stage, from strategic planning and pr

Full-time

SoC UPF Methodology Engineer

Austin, Texas

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Today

Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting-edge technology and capabilities for low-power chip design. Your work will fuel Apple's next-generation chips! You'll play a crucial role in exploring AI/ML to design the workflow for the next generation of UPF. Additionally, you'll refine our existing UPF framework and ensure its seamless integration and rigorous verification acr

Full-time

PD Engineer

Sunnyvale, California

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Today

Senior Physical Design Engineer Sunnyvale, CA, USA Fulltime Visa- G C and U S C Only We are looking for a Senior Physical Design Engineer with 814 years of experience to lead and execute RTL to GDSII implementation for low power SoCs on advanced nodes. This role demands deep expertise in Synopsys Fusion Compiler, strong scripting and automation, and a proven track record of achieving best-in-class PPA. What You will Do: Drive physical design flow: synthesis, floorplanning, placement, CTS, rout

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Full-time

Depends on Experience

Staff Physical Design Engineer

Sunnyvale, California

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6d ago

Required Qualifications: Bachelor s/Master s degree in Electrical Engineering or related field8 12 years of experience in ASIC physical designProven experience in full-chip or large block implementation and tapeoutsStrong expertise in:Floorplanning and power planningPlacement, CTS, routing, and physical verificationStatic Timing Analysis (STA) and timing closureHands-on experience with industry-standard tools such as: Synopsys ICC2 / Cadence InnovusSynopsys PrimeTimeMentor CalibreExperience with

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Contract, Third Party

Depends on Experience

Design Verification Engineer

Remote

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5d ago

Hi - Full Time Role Job Title: Design Verification Engineer -Performance Modelling Location : Remote USA Strong understanding of SV and UVM and good debugging skills.Understand design specs and develop test plans based on functional and architectural requirementsBuild UVM/System Verilog-based verification environments for IP/subsystem/SoC level testingDevelop directed and random testcases, perform coverage analysis, and close functional/code coverageDebug simulation failures and work closely wi

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Full-time

Depends on Experience

DFx Verification Engineer

Santa Clara, California

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Today

DFx Verification Engineer Location: - Santa Clara, CA (Onsite) Exp Range: - 5-20 Years of experience Long Term Contract (12 Months +) / Full Time Position JD Key Responsibilities Develop and execute verification plans for DFx features including: Scan (stuck-at, transition fault) MBIST / LBIST Boundary Scan (JTAG) Memory repair and redundancy Low-power test scenarios Create and maintain testbenches using SystemVerilog/UVM for DFx validation Verify: Scan chain integrity and connectivity T

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Full-time, Part-time, Contract, Third Party

Physical Design Engineer & DV Engineers

Sunnyvale, California

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21d ago

Job Title:PhysicalDesignEngineer(PD/PnR) Location Bay Area CA / Austin TX (Hybrid) Job Summary Seeking aPhysicalDesignEngineerwith strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion Compiler. The candidate will be responsible for implementation, timing closure, low-power integration, and signoff activities for complex SoCdesigns. Key Responsibilities Perform block-level and top-levelPhysicalDesignimplementation using Fusion Compiler. Drive floorplannin

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Full-time

160,000 - 170,000

Physical Design Engineer (PD/PnR)

Austin, Texas

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30+d ago

Job Role -Physical Design Engineer (PD/PnR)Location- Bay Area CA / Austin TX (Hybrid) Job Summary Seeking a Physical Design Engineer with strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion Compiler. The candidate will be responsible for implementation, timing closure, low-power integration, and signoff activities for complex SoC designs. Key Responsibilities Perform block-level and top-level Physical Design implementation using Fusion Compiler.Drive flo

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Full-time

130,000 - 140,000

Senior Staff Verification Consultant

Austin, Texas

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Today

Job Description Onsite in Austin, TX or San Jose, CA - 5 days a week Description As a Senior Staff System IP Design Verification Contractor you will contribute to the functional verification of System IP including coherent interconnect and caches. This is a technical individual contributor role with heavily involved hands-on project execution. A strong background in Design Verification and hands-on experience with both block-level and top-level is required to be successful in this role. Key r

Contract

Senior Staff Verification Consultant

Austin, Texas

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Today

Job Title: Senior Staff Verification Consultant Location: Austin, TX (Onsite, 5 days/week) Duration: Long Term Only W2 //NO CORP TO CORP// Description As a Senior Staff System IP Design Verification Contractor you will contribute to the functional verification of System IP including coherent interconnect and caches. This is a technical individual contributor role with heavily involved hands-on project execution. A strong background in Design Verification and hands-on experience with both block

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Contract

85 - 95

Design Engineer III

Sunnyvale, California

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Today

Job Description Onsite 3 days in Sunnyvale, CA Job Description About the role: Design Verification engineer for wearables silicon accelerator IPs - testbench development, coverage-driven verification, RTL debug, and power/performance measurement. Responsibilities Develop and execute verification plans for RTL blocks/IPs across the subsystem. Build and maintain SystemVerilog/UVM testbenches; write directed and constrained-random tests. Drive functional coverage and assertion (SVA) closure; run a

Contract

USD 80.00 - 86.00 per hour

Design Verification Engineer

San Diego, California

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20d ago

Design Verification EngineerLocation: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job SummaryWe are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC verification to join our semiconductor team. The ideal candidate will have extensive experience in SystemVerilog, UVM, and protocol verification, with a proven track record of developing robust verification environments and achieving coverage closure. Key ResponsibilitiesDevelop and execute comprehensive ve

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Full-time, Third Party

180,000 - 200,000

Emulation Verification Engineer

San Francisco, California

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Today

Imagine what you could at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengt

Full-time

Lead Functional Product Engineer, Power Analysis

San Jose, California

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Today

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a skilled engineer to join our Power Analysis team, focused on developing, debugging, and deploying Signoff power analysis flows at customer environments. Key Responsibilities Closely work with R&D to develop and maintain Signoff power analysis flows including integration with synthesis and PnR stages Reproduce, debug, and resolve customer-reported issues in power an

Full-time

USD 114,800.00 - 213,200.00 per year

Associate Staff Verification Engineer - Wireless

Austin, Texas

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Today

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative soluti

Full-time

USD 126,000.00 - 234,000.00 per year

Digital Verification Engineer

South San Francisco, California

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Today

About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Job Description & Responsibilities: We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design and verification fundamentals to work in Neuralink's System-on-Chip (SoC) department under the Implant Team. This position offers

Full-time

USD 131,000.00 - 243,000.00 per year

Principal Front-End Design Automation Engineer

Portland, Oregon

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Today

Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team - we'd

Full-time

USD 182,000.00 - 273,000.00 per year