Search Jobs | Dice.com

Remote

•

Today

RTL Design Engineer Wireless SoC Location: Remote (must be aligned with PST time zone / willing to work PST hours) Long term We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon. Key Responsibilities Design, implement, and verify digital blocks for wi

Easy Apply

Contract

Depends on Experience

ASIC/RTL Design Engineer 2

San Jose, California

•

Today

We are looking for ASIC/RTL Design Engineer 2 for our client in San Jose, CA.Job Title: ASIC/RTL Design Engineer 2 Job Location: San Jose, CA Job Type: Contract Job Overview: Pay Range: $60/hr - $62/hr The position involves working on advanced digital CMOS processes and leading the design of state-of-the-art SoCs.Requirement/Must Have: Experience in SoC Architecture.Hands-on experience in industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing

Easy Apply

Contract, Third Party

Depends on Experience

ASIC/SoC RTL Design Engineer

San Jose, California

•

Today

In-Person Interview Required! SoC RTL Design Engineer San Jose, CA: 100% Onsite 6 + Months $60-$62.50/HR Role: Design and develop advanced SoCs across architecture, RTL, and verification. Responsibilities: RTL design, verification, and debugging Support synthesis and timing closure Work with ARM cores, DDR, PCIe, Ethernet, and IP Collaborate with design and bring-up teams Qualifications: Experience in ASIC/SoC design and RTL coding Knowledge of ARM and standard I/O interfaces Dexian stands a

Easy Apply

Contract

$60 - $62.50 per hour

ASIC/ SoC RTL Design Engineer

Hybrid in Burlingame, California

•

21d ago

Title: ASIC/SoC RTL Design Engineer Location: Palo Alto, CA (Or potentially Burlington, MA) Length of Contract: 6 months+ (Temp-to-Perm) Ideal Start: 6/1/2026 Responsibilities : Own end-to-end design of complex SoC subsystems, driving architecture, RTL implementation, and tapeout. Focus on high-performance Datapath, PPA optimization, and cross-functional integration across silicon, firmware, and system teams. Must haves: 8 12+ years in ASIC/SoC digital design with hands-on RTL ownershipStrong Sy

Easy Apply

Contract

$83 - $93

ASIC RTL Design Engineer - Onsite

San Jose, California

•

Today

Title: ASIC RTL Design Engineer - Onsite Mandatory skills: SoC Architecture, ASIC design flow, RTL coding, debugging, verification, supporting synthesis, timing closure, ARM cores, I/O standard interfaces, Ethernet, DDR, DMA, PCIE, SATA, internal IPs, digital CMOS processes, SoC design, Chip definition, Architecture development, modeling, micro-architectural specifications, micro-architectural specifications, logic implementation, emulation, debug Description: JOB DUTIES: The work will expose th

Easy Apply

Contract

57 - 62

ASIC/RTL Design Engineer

San Jose, California

•

Today

Job Title: ASIC/RTL Design Engineer 2 Location: San Jose, CA Type: 12+ Months Contract Job Duties: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and AMD internal IP?s. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC?s in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC design including Chip Definition, Architecture develop

Easy Apply

Contract

Depends on Experience

Senior FPGA / RTL Design Engineer - Signal Processing

Los Angeles, California

•

Today

Company Overview At Motorola Solutions, we believe that everything starts with our people. We're a global close-knit community, united by the relentless pursuit to help keep people safer everywhere. We build and connect technologies to help protect people, property and places. Our solutions foster the collaboration that's critical for safer communities, safer schools, safer hospitals, safer businesses, and ultimately, safer nations. Connect with a career that matters, and help us build a safer

Full-time

USD 125,000.00 - 195,000.00 per year

Integration RTL Design Engineer

San Jose, California

•

Today

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the wo

Full-time

USD 145,600.00 per year

Wireless SoC RF Integration and Validation Engineer

San Francisco, California

•

Today

Come and join Apple's growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verifi

Full-time

Wireless SoC RF Integration and Validation Engineer

Los Angeles, California

•

Today

Full-time

Wireless SOC FW Engineer

San Francisco, California

•

Today

Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integratio

Full-time

Staff SoC RTL Performance Verification and Emulation Engineer

Austin, Texas

•

Today

Job Description: Passionate in analyzing performance bottlenecks and driving architectural improvements? Eager to expand into building SoC platforms for performance analysis? Arm's System-on-Chip (SoC) Performance Analysis Team in Central Technology Group builds early Performance analysis platforms to enable system technology exploration on future Arm System/SoC architecture. Using workload characterization and analysis, we influence future SoC, CPU and IP designs. We are seeking highly skill

Full-time

USD 198,100.00 - 268,000.00 per year

Principal Product Engineer - RTL IPs & Design Verification

Natick, Massachusetts

•

8d ago

Job Summary MathWorks has a hybrid work model that enables staff members to split their time between office and home. The hybrid model provides the advantage of having both in-person time with colleagues and flexible at-home life optimizations. Learn More: ;br> MathWorks is seeking a Product Marketing engineer to drive the success of our HDL, FPGA, and ASIC verification products. In this role, you will develop and execute targeted marketing strategies, collaborate with development and sales tea

Full-time

USD 144,600.00 - 231,400.00 per year

Post Silicon Validation Engineer

Sunnyvale, California

•

Today

Post Silicon Validation Engineer Location: Austin TX/ Sunnyvale CA - Work Mode: 100 % Onsite Salary: Market Negotiable for right fit FTE/Fulltime-Immediate start What you will be doing:Validate ML-Coprocessor, display SOC, Mixed Signal SOC, and IP.Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW.Develop silicon validation infrastructure and coding C/C++ and Python for emulation (Zebu), FPGA (HAPS), and first silicon platforms. Identify risks and

Easy Apply

Full-time, Third Party

Depends on Experience

Senior Engineer, GPU RTL Design - Pixel Pipe

San Jose, California

•

Today

Position Summary Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the wo

Full-time

USD 139,000.00 - 208,400.00 per year

Power Engineer (RTL Design)

Sunnyvale, California

•

6d ago

Please look for design engineers with power analysis experience Verification engineers with power aware verification or low power design verification experience. ASIC/SOC power engineers with experience on tools like PTPX / RTL-A. We are seeking a highly skilled and motivated Contract Worker for RTL Design and Verification with expertise in power profiling and automation. The ideal candidate will play a crucial role in the analysis of power consumption, identifying hardware events that correlate

Easy Apply

Full-time

100,000 - 140,000

Power Engineer (RTL Design)

Austin, Texas

•

6d ago

Easy Apply

Full-time

100,000 - 140,000

Firmware Engineer

Boca Raton, Florida

•

13d ago

Vaco is hiring for a Digital Imaging Firmware Engineer Location: Boca Raton, FL General Description A growing engineering team in Boca Raton, Florida is seeking a digital firmware design engineer to help develop the next generation of camera test equipment. The focus will be on the design and development of firmware for FPGAs in camera systems. The successful candidate will work in a small team of highly skilled hardware and software engineers where contributions are recognized and knowledge, t

Easy Apply

Full-time

$150000

ASIC Verification Engineer

Hybrid in Burlingame, California

•

21d ago

Title: ASIC Verification Engineer (Python/Cocotb) Hybrid Role- 3 days onsite/2 days remote- (Burlingame, CA or Burlington, MA) Length of Contract: 6-9 months - Temp-to-Perm Hours: 40 hours per week Scope:Client needs someone to lead verification for complex SoC subsystems using Python-based frameworks (CocoTB Framework) with a focus on DSP validation and/or CPU subsystems, scalable test environments, and full verification closure through tapeout. Must haves: 8+ years inASIC/SoC digital verifi

Easy Apply

Contract

$80 - $90

DFT Engineer

San Jose, California

•

3d ago

Role :- Senior ASIC DFT CDC Constraints Eng Location :- San Jose, CA/Milpitas, CA (Remote) Type :- */W2 This is a highly specialised role at the intersection of Design for Test (DFT) architecture and clock domain crossing (CDC) constraint engineering. The successful candidate will own the SDC/SSTA constraint strategy that governs both functional timing closure and DFT scan-mode operation across a complex multi-clock SoC. You will work daily at the boundary where CDC violations manifest as sca

Easy Apply

Full-time, Third Party

Depends on Experience

Filter Results

Job post features

Posted date

Work settings

Employment type

Distance

Employer type

Work authorization