San Jose, California
•
3d ago
Highly experienced with the layout of PCB platforms for embedded compute.Experience of designing complex, impedance controlled multi-layer (>20), PTH and HDI PCBs with high pin count devices (>8K), high-speed interfaces (PCIe Gen5/6 and LPDDR5/6), differential pairs, high-current power planes.Experience of working alongside a chip packaging team.Able to influence and advise on pinout and routing topologies of SoC's or complex FPGA devices, cost optimisation, routing feasibility and layer trade-o
Easy Apply
Contract
$60 - $70